參數(shù)資料
型號(hào): MSM6665C-xx
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: DOT MATRIX LCD CONTROLLER WITH 17-DOT COMMON DRIVER AND 80-DOT SEGMENT DRIVER
中文描述: 點(diǎn)陣LCD控制器,17點(diǎn)通用驅(qū)動(dòng)程序和80點(diǎn)段驅(qū)動(dòng)
文件頁(yè)數(shù): 15/31頁(yè)
文件大?。?/td> 499K
代理商: MSM6665C-XX
15/31
Semiconductor
MSM6665C-xx
FEDL6665C-02
I/O Procedure
Input timing (command input, display data input)
8-bit input synchronization is taken by this leading edge.
If input in an 8-bit unit is kept, the following leading edges of CS is not needed.
17D : Max=[Master clock cycle] x 10
9D : Max=[Master clock cycle] x 20
BUSY
LSB
LSB
MSB
MSB
BUSY
"Z"
don't care
C/
D
C/
D
CS
SO
SI
SHT
NON-BUSY/
Note: If CS is set at "L" level when 8-bit read-out is not complete, and CS is set at "H" level
again, then read-out operation is executed, uncomplete data will be output continually
and the remaining read-out data will be zero.
Output timing (display code data output)
Code data or arbitrator data indicated by the address pointer is always output, provided
that the SOE command has already been input.
BUSY
LSB
MSB
NON-BUSY/
BUSY
"Z"
don't care
C/
D
CS
SO
SHT
Synchronization in an 8-bit unit.
17D : Max=[Master clock cycle] x 10
9D : Max=[Master clock cycle] x 20
NON-BUSY
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