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參數(shù)資料
| 型號： | MSM6542-02 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | REAL TIME CLOCK WITH PERIODIC AND ALARM OUTPUT |
| 中文描述： | 實時時鐘周期和報警輸出 |
| 文件頁數(shù)： | 12/54頁 |
| 文件大?。?/td> | 378K |
| 代理商： | MSM6542-02 |
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Semiconductor
MSM6542-01/02/03
79
DESCRIPTION OF PINS
D
0
to D
3
(Data bus pins 0 to 3)
These input pins connected to the data bus of a microcomputer are used for the microcomputer
to read and write registers. The interface uses the positive logic. When
CS
0
is low, CS
is high,
RD
is low, and
WR
is high (for the 68-xxx system,
CS
is low, CS
is high, R/
W
is high, and E is
high), these data bus pins are in the output mode. In the other cases, they are in the high
impedance status.
A
0
to A
3
(Address bus pins 0 to 3)
These input pins connected to the address bus of a microcomputer specify a register used by the
microcomputer for read or write. The address data specified by these pins is used in conjunction
with the input to the ALE pin.
ALE (Address Latch Enable)
This input pin is for address and
CS
0
.
When the ALE pin is high, the address bus data and
CS
are read into the IC. When it is low,
the address data and
CS
0
read at ALE = H are retained in the IC. CS
1
functions independently
of the ALE pin.
When using an MSC-48-, MSC-51-, or 8085-based microcomputer having an ALE output pin,
connect this pin to the ALE output pin of the microcomputer. When a four-bit microcomputer
shares the four address bus pins, A
0
to A
3
, with another peripheral IC, the ALE pin on this IC
can be used to specify it.
When the microcomputer has no ALE output pin, connect the ALE input pin on this IC to the
V
DD
.
WR
[R/
W
] (WRITE [READ/
WRITE
])
This input pin is connected to the
WR
pin for the 80-based CPU or the R/
W
pin for the 68-based
CPU.
RD
[E] (READ [E])
This input pin is connected to the
RD
pin for the 80-based CPU or the E pin for the 68-based CPU.
CS
0
, CS
1
(Chip select pins 0 and 1)
These input pins enable or disable input of ALE,
WR
(R/
W
), and
RD
(E). When
CS
is low and
CS
is high, these inputs are enabled. In the other combinations, the IC unconditionally assumes
that ALE is low and
WR
and
RD
are high (for the 68-based CPU, E is low). However,
CS
0
needs
to operate in conjunction with ALE and CS
operates independently of ALE. Connect CS
to the
power supply voltage detection pin. For more information, see the descriptions in "USAGE"
and "USE OF CS
1
."
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