參數(shù)資料
型號: MSM6542-01MS-K
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 時鐘/數(shù)據(jù)恢復及定時提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO20
封裝: 0.250 INCH, PLASTIC, SSOP-20
文件頁數(shù): 33/55頁
文件大?。?/td> 361K
代理商: MSM6542-01MS-K
Semiconductor
MSM6542-01/02/03
105
When a system is implemented with DP = 1:
Switching to the standby mode
Existing from the standby mode
POWER OFF
* 2
2 V or more
4 ~ 6V
4 ~ 4.5V
Main power
supply
(4 ~ 4.5V)
CS1
4
5 VDD
1
5 VDD
a
*1
0V
b
*1, *2:
The duration in this interval must be 8.7 ms or less.
Through current at the input stage (A
0 ~ A3, D0 ~ D3, control inputs) caused by intermediate voltage
input level and bus charge current cuaused by not programmed read out operation of CPU will
dissipate power source.
Therefore, it is recommended that the voltage for monitoring the power supply of the CS1 control
system be higher than the main power supply/battery switching voltage so that battery backup is
enabled only in the interval from a .. to b .. .
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