參數(shù)資料
型號(hào)： MSM64162-XXXGS-BK-F
廠商： LAPIS SEMICONDUCTOR CO LTD
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 0.4 MHz, MICROCONTROLLER, PQFP80
封裝： 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁(yè)數(shù)： 30/40頁(yè)
文件大?。?/td> 348K
代理商： MSM64162-XXXGS-BK-F
35/39
Semiconductor
MSM64162
Clock generation circuit (2CLK)
The clock generation circuit (2CLK) in the MSM64162 contains a 32.768 kHz crystal oscillation
circuit, a 400 kHz RC oscillation circuit, and a clock control port. This circuit generates the system
clock (CLK) and the time base clock (32.768 kHz).
The system clock drives the CPU while the time base clock drives the time base counter and the
buzzer driver.
Via the contents of the frequency Control Register (FCON), the system clock can be switched
between 32.768 kHz (the output of the crystal oscillation circuit) and 400 kHz (the output of the
RC oscillation circuit).
Note: The oscillation frequency of the RC oscillation circuit varies depending on the value of
an external resistor (ROS), operating power supply voltage (VDD), and ambient
temperatures (Ta).
Time base counter (TBC)
The MSM64162 has a built-in time base counter (TBC) that generates clocks to be supplied to
internal peripheral circuits. The time base counter is composed of 15 binary counters. The count
clock of the time base is driven by the oscillation clock (32.768 kHz) of the crystal oscillation
circuit. The output of the time base counter is used for the buzzer driver, the system reset circuit,
the watchdog timer, the time base interrupt, the sampling clocks of each port, and the capture
circuit.
I/O port
Input-output ports (P2, P3) (8 bits)
: Pull-up (pull-down) resistor input or high-
impedance input, CMOS output or NMOS
open drain output: these can be specified for
each bit; external 0 interrupt
Input port (P0) (4 bits)
: Pull-up (pull-down) resistor input or high-
impedance input; external 1 interrupt
Output port (P1) (4 bits)
: CMOS output or NMOS open drain output
Interrupt (INTC)
The MSM64162 has 9 interrupt sources (9 vector addresses), of which two are external interrupts
from ports and seven are internal interrupts.
Of the nine interrupt sources, only the watchdog interrupt cannot be disabled (non-maskable
interrupt). The other eight interrupts are controlled by the master interrupt enable flag (MI) and
the interrupt enable registers (IE0, IE1 and IE2). When an interrupt condition is met, the CPU
branches to a vector address corresponding to the interrupt source.
Battery check circuit (BC)
The battery check circuit (BC) detects the level of the supply voltage by comparing the voltage
generated by an external supply-voltage dividing resistor (RBLD) with the internal reference
voltage (Vrb).
相關(guān)PDF資料
PDF描述
MSM64162-XXXGS-BK 4-BIT, MROM, 0.4 MHz, MICROCONTROLLER, PQFP64
MSM64162-XXXGS-K-F 4-BIT, MROM, 0.066 MHz, MICROCONTROLLER, PQFP80
MSM64162A-XXXGS-BK 4-BIT, MROM, 0.4 MHz, MICROCONTROLLER, PQFP80
MSM64162A-XXX 4-BIT, MROM, 0.4 MHz, MICROCONTROLLER, UUC77
MSM64162D-XXXGS-BK 4-BIT, MROM, MICROCONTROLLER, PQFP64
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