
Semiconductor
MSM52V1001LP
This version: Jan. 1998
Previous version: Aug. 1996
1/11
131,072-Word
¥
8-Bit CMOS STATIC RAM
DESCRIPTION
The MSM52V1001LP is a 131,072-word by 8-bit CMOS static RAM featuring 3.0 V to 3.6 V power
supply operation in the range of –40C to 85C and direct LVCMOS input/output compatibility.
Since the circuitry is completely static, external clock and refreshing operations are unnecessary,
making this device very easy to use. The MSM52V1001LP can be used in the high-speed operation
of an access time 100 ns due to adopting a high-performance CMOS technology and in the low
current consumption of a standby current max. 50
m
A when there is no chip selection. In addition,
the MSM52V1001LP is the most suitable memory for microcomputer systems or data terminals
because it is provided with a chip enable signal (
CE
1
) suited to the expansion of a memory capacity,
a chip enable signal (CE
2
) suited to a battery back-up, and an output enable signal (
OE
) suited to
the I/O bus line control.
FEATURES
131,072-word
¥
8-bit configuration
Power supply voltage:
Fully static operation
Operating temperature range:Ta = –40
°
C to 85
°
C
(Input/Output) LVCMOS compatible
3-state output
Data retention available at power supply voltage 2 V
Package options:
32-pin 600 mil plastic DIP
32-pin 525 mil plastic SOP
32-pin plastic TSOP (Type I) (TSOPI32-P-820-0.50-K) (Product : MSM52V1001LP-xxTS-K)
(TSOPI32-P-820-0.50-L)
3.0 V to 3.6 V
(DIP32-P-600-2.54)
(SOP32-P-525-1.27-K)
(Product : MSM52V1001LP-xxRS)
(Product : MSM52V1001LP-xxGS-K)
(Product : MSM52V1001LP-xxTS-L)
xx indicates speed rank.
PRODUCT FAMILY
0.18 mW
MSM52V1001LP-12
108 mW
MSM52V1001LP-10
126 mW
120 ns
100 ns
Family
Access Time (Max.)
Power Dissipation
Operating (Max.)
Standby (Max.)
E2I0016-17-Y1