
Semiconductor
MSM52V1001L
1/11
131,072-Word
¥
8-Bit CMOS STATIC RAM
DESCRIPTION
The MSM52V1001L is a 131,072-word by 8-bit CMOS static RAM featuring 2.7 V to 3.6 V power
supply operation and direct LVCMOS input/output compatibility. Since the circuitry is completely
static, external clock and refreshing operations are unnecessary, making this device very easy to use.
The MSM52V1001L can be used in the high-speed operation of an access time 100 ns due to adopting
a high-performance CMOS technology and in the low current consumption of a standby current
max. 40
m
A when there is no chip selection. In addition, the MSM52V1001L is the most suitable
memory for microcomputer systems or data terminals because it is provided with a chip enable
signal (
CE
1
) suited to the expansion of a memory capacity, a chip enable signal (CE
2
) suited to a
battery back-up, and an output enable signal (
OE
) suited to the I/O bus line control.
FEATURES
131,072-word
¥
8-bit configuration
Power supply voltage: 2.7 V to 3.6 V
Fully static operation
Operating temperature range: Ta = 0
°
C to 70
°
C
(Input/Output) LVCMOS compatible
3-state output
Data retention available at power supply voltage 2 V
Package options:
32-pin 600 mil plastic DIP
32-pin 525 mil plastic SOP
32-pin plastic TSOP (Type I)
(DIP32-P-600-2.54)
(SOP32-P-525-1.27-K)
(TSOPI32-P-820-0.50-K)
(TSOPI32-P-820-0.50-L)
(Product : MSM52V1001L-xxRS)
(Product : MSM52V1001L-xxGS-K)
(Product : MSM52V1001L-xxTS-K)
(Product : MSM52V1001L-xxTS-L)
xx indicates speed rank.
PRODUCT FAMILY
0.144 mW
MSM52V1001L-12
108 mW
MSM52V1001L-10
126 mW
120 ns
100 ns
Family
Access Time (Max.)
Power Dissipation
Operating (Max.)
Standby (Max.)
E2I0015-17-Y1
This version: Jan. 1998
Previous version: Aug. 1996