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參數(shù)資料
| 型號： | MSM51V1000A-10 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 1,048,576-Word ⅴ 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| 中文描述： | 1,048,576詞ⅴ1位動態(tài)內(nèi)存：快速頁面模式型 |
| 文件頁數(shù)： | 8/15頁 |
| 文件大?。?/td> | 220K |
| 代理商： | MSM51V1000A-10 |
8/15
Semiconductor
MSM51V1000A
Notes:
1. A start-up delay of 100
μ
s is required after power-up, followed by a minimum of
eight initialization cycles (
RAS
-only refresh or
CAS
before
RAS
refresh) before
proper device operation is achieved.
2. The AC characteristics assume t
T
= 5 ns.
3. V
IH
(Min.) and V
IL
(Max.) are reference levels for measuring input timing signals.
Transition times (t
T
) are measured between V
IH
and V
IL
.
4. This parameter is measured with a load circuit equivalent to 1 TTL load and 100 pF.
The output timing reference levels are V
OH
= 2.0 V and V
OL
= 0.8 V.
5. Operation within the t
RCD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
RCD
(Max.) is specified as a reference point only. If t
RCD
is greater than the specified
t
RCD
(Max.) limit, then the access time is controlled by t
CAC
.
6. Operation within the t
RAD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
RAD
(Max.) is specified as a reference point only. If t
RAD
is greater than the specified
t
RAD
(Max.) limit, then the access time is controlled by t
AA
.
7.
t
OFF
(Max.) defines the time at which the output achieves the open circuit condition
and
is not referenced to output voltage levels.
8. t
RCH
or t
RRH
must be satisfied for a read cycle.
9. t
WCS
, t
CWD
, t
RWD
, t
AWD
and t
CPWD
are not restrictive operating parameters. They are
included in the data sheet as electrical characteristics only. If t
WCS
≥
t
WCS
(Min.), then
the cycle is an early write cycle and the data out will remain open circuit (high
impedance) throughout the entire cycle. If t
CWD
≥
t
CWD
(Min.) , t
RWD
≥
t
RWD
(Min.),
t
AWD
≥
t
AWD
(Min.) and t
CPWD
≥
t
CPWD
(Min.), then the cycle is a read modify write
cycle and data out will contain data read from the selected cell; if neither of the above
sets of conditions is satisfied, then the condition of the data out (at access time) is
indeterminate.
10. These parameters are referenced to the
CAS
leading edge in an early write cycle, and
to the
WE
leading edge in a read modify write cycle.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| MSM51V1000A-70 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:1,048,576-Word ⅴ 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM51V1000A-80 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:1,048,576-Word ⅴ 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM51V16100 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:16,777,216-Word x 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM51V16160A | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM51V16160D | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
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