參數(shù)資料
型號： MSC8251TVT1000B
廠商： Freescale Semiconductor
文件頁數(shù)： 1/2頁
文件大?。?/td> 0K
描述： IC DSP SINGLE 1GHZ 783FCPBGA
標(biāo)準(zhǔn)包裝： 1
系列： StarCore
類型： SC3850 內(nèi)核
接口： 以太網(wǎng)，I²C，PCI，RGMII，串行 RapidIO，SGMII，SPI，UART/USART
時鐘速率： 1.0GHz
非易失內(nèi)存： ROM（96 kB）
芯片上RAM： 576kB
電壓 - 輸入/輸出： 2.50V
電壓 - 核心： 1.00V
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 783-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 783-FCPBGA（29x29）
包裝： 托盤
Overview
The MSC8251 is based on the industry's
highest performance DSP core, built on
StarCore technology, and designed for the
advanced processing requirements and
capabilities of today’s high-end medical
imaging, aerospace, defense and advanced
test and measurement markets. It delivers
industry-leading performance, leveraging
45 nm process technology in a highly
integrated DSP to provide performance of
1 GHz. The MSC8251 will help equipment
manufacturers create end products and
services that integrate more functionality in
a smaller hardware footprint.
The MSC8251 DSP delivers a high level of
performance and integration, with a fully
programmable SC3850 core running at up
to 1 GHz. The SC3850 DSP core has been
independently assessed to enable 40 percent
more processing capability per MHz than the
nearest DSP competition. A high-performance
internal RISC-based QUICC Engine
subsystem supports multiple networking
protocols to guarantee reliable data transport
over packet networks while significantly
offloading processing from the DSP cores.
The MSC8251 embeds a substantial amount
of internal memory to support a variety
of advanced high-speed interface types,
including two Serial RapidIO interfaces,
two Gigabit Ethernet interfaces for network
communications, a PCI Express interface,
two DDR controllers for high-speed, industry
standard memory interface and four multi-
channel TDM interfaces.
The MSC8251 allows a high degree of
scalability through pin compatibility with all
MSC825x and MSC815x DSP devices.
Digital Signal Processors
MSC8251 High-Performance DSP
Single-core programmable DSP for medical imaging, aerospace, defense and advanced
test and measurement
MSC8251 Block Diagram
JTAG
DDR Interface 64/32-bit 800 MHz
DMA
I/O Interrupt
Concentrator
UART
Clocks
Timers
Reset
Semaphores
DDR2/DDR3
SDRAM Controller
CLASS
Boot ROM
I2C
Virtual
Interrupts
High-Speed
Serial Interface
Two
SGMII
M3 Memory
1056 KB
DDR Interface 64/32-bit 800 MHz
DDR2/DDR3
SDRAM Controller
512 KB L2 Cache/
M2 Memory
SC3850 DSP Core
32 KB L1
I-Cache
32 KB L1
D-Cache
Four TDMs Each
Supporting 8 E1
4
TDMs
DSP Core at 1 GHz
Two RGMII
SPI
QUICC Engine
Subsystem
Two Serial RapidIO Interfaces
x1/x4 3.125 Gbaud
PCI Express Interface x1/x2/x4
Two SGMII
Other
Modules
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