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參數(shù)資料
| 型號： | MSC8122VT8000 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Quad Core 16-Bit Digital Signal Processor |
| 中文描述： | 四核16位數(shù)字信號處理器 |
| 文件頁數(shù)： | 1/88頁 |
| 文件大?。?/td> | 983K |
| 代理商： | MSC8122VT8000 |
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Freescale Semiconductor
Technical Data
MSC8122
Rev. 13, 10/2006
Freescale Semiconductor, Inc., 2004, 2006. All rights reserved.
MSC8122
Quad Core 16-Bit Digital Signal Processor
The MSC8122 is a highly integrated system-on-a-chip that combines four SC140 extended cores with an RS-232
serial interface, four time-division multiplexed (TDM) serial interfaces, thirty-two general-purpose timers, a
flexible system interface unit (SIU), an Ethernet interface, and a multi-channel DMA engine. The four extended
cores can deliver a total 4800/6400/8000 DSP MMACS performance at 300/400/500 MHz.
Each core has four arithmetic logic units (ALUs), internal memory, a write buffer, and two interrupt controllers.
The MSC8122 targets high-bandwidth highly computational DSP applications and is optimized for wireless
transcoding and packet telephony as well as high-bandwidth base station applications. The MSC8122 delivers
enhanced performance while maintaining low power dissipation and greatly reducing system cost.
Figure 1.
MSC8122 Block Diagram
MQBus
SQBus
Local Bus
128
128
Boot
ROM
64
PLL
JTAG
RS-232
Internal Local Bus
Internal System Bus
IPBus
IP Master
64
64
UART
Memory
Controller
M2
RAM
GPIO Pins
Interrupts
Memory
Controller
System Bus
32/64
DSI Port
32
32/64
PLL/Clock
JTAG Port
SC140
Extended Core
SC140
Extended Core
SC140
Extended Core
System
Interface
32 Timers
4 TDMs
SC140
Extended Core
DMA
Bridge
SIU
Registers
Direct
Slave
Interface
(DSI)
8 Hardware
Semaphores
Ethernet
GIC
GPIO
MII/RMII/SMII
The raw processing power of
this highly integrated system-
on- a-chip device will enable
developers to create next-
generation networking
products that offer
tremendous channel
densities, while maintaining
system flexibility, scalability,
and upgradeability. The
MSC8122 is offered in three
core speed levels: 300, 400,
and 500 MHz.
What’s New
Rev. 13
includes the following:
Chapter 2
updates
Table 2-13
to
add timings 17 and 18 for IRQs.
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