參數(shù)資料
型號(hào)： MSC1212Y3PAGRG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64
封裝： GREEN, PLASTIC, TQFP-64
文件頁(yè)數(shù)： 56/111頁(yè)
文件大小： 1113K
代理商： MSC1212Y3PAGRG4
MSC1211, MSC1212
MSC1213,MSC1214
SBAS323G JUNE 2004 REVISED OCTOBER 2007
www.ti.com
49
Port 0 (P0)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Reset Value
SFR 80h
P0.7
P0.6
P0.5
P0.4
P0.3
P0.2
P0.1
P0.0
FFh
P0.70
Port 0. This port functions as a multiplexed address/data bus during external memory access, and as a general-
bits 70
purpose I/O port when external memory access is not needed. During external memory cycles, this port will contain
the LSB of the address when ALE is high, and Data when ALE is low. When used as a general-purpose I/O, this port
drive is selected by P0DDRL and P0DDRH (ACh, ADh). Whether Port 0 is used as general-purpose I/O or for external
memory access is determined by the Flash Configuration Register (HCR1.1) (See SFR CADDR 93h).
Stack Pointer (SP)
7
6
5
4
3
2
1
0
Reset Value
SFR 81h
SP.7
SP.6
SP.5
SP.4
SP.3
SP.2
SP.1
SP.0
07h
SP.70
Stack Pointer. The stack pointer identifies the location where the stack will begin. The stack pointer is incremented
bits 70
before every PUSH or CALL operation and decremented after each POP or RET/RETI. This register defaults to 07h
after reset.
Data Pointer Low 0 (DPL0)
7
6
5
4
3
2
1
0
Reset Value
SFR 82h
DPL0.7
DPL0.6
DPL0.5
DPL0.4
DPL0.3
DPL0.2
DPL0.1
DPL0.0
00h
DPL0.70
Data Pointer Low 0. This register is the low byte of the standard 8051 16-bit data pointer. DPL0 and DPH0 are used
bits 70
to point to non-scratchpad data RAM. The current data pointer is selected by DPS (SFR 86h).
Data Pointer High 0 (DPH0)
7
6
5
4
3
2
1
0
Reset Value
SFR 83h
DPH0.7
DPH0.6
DPH0.5
DPH0.4
DPH0.3
DPH0.2
DPH0.1
DPH0.0
00h
DPH0.70
Data Pointer High 0. This register is the high byte of the standard 8051 16-bit data pointer. DPL0 and DPH0 are used
bits 70
to point to non-scratchpad data RAM. The current data pointer is selected by DPS (SFR 86h).
Data Pointer Low 1 (DPL1)
7
6
5
4
3
2
1
0
Reset Value
SFR 84h
DPL1.7
DPL1.6
DPL1.5
DPL1.4
DPL1.3
DPL1.2
DPL1.1
DPL1.0
00h
DPL1.70
Data Pointer Low 1. This register is the low byte of the auxiliary 16-bit data pointer. When the SEL bit (DPS.0) (SFR
bits 70
86h) is set, DPL1 and DPH1 are used in place of DPL0 and DPH0 during DPTR operations.
Data Pointer High 1 (DPH1)
7
6
5
4
3
2
1
0
Reset Value
SFR 85h
DPH1.7
DPH1.6
DPH1.5
DPH1.4
DPH1.3
DPH1.2
DPH1.1
DPH1.0
00h
DPH1.70
Data Pointer High. This register is the high byte of the auxiliary 16-bit data pointer. When the SEL bit (DPS.0) (SFR
bits 70
86h) is set, DPL1 and DPH1 are used in place of DPL0 and DPH0 during DPTR operations.
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