參數(shù)資料
型號(hào)： MR80C52XXX-36SHXXX
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44
封裝： LCC-44
文件頁(yè)數(shù)： 13/46頁(yè)
文件大?。?/td> 7004K
代理商： MR80C52XXX-36SHXXX
145
7593L–AVR–09/12
AT90USB64/128
16. 8-bit Timer/Counter2 with PWM and asynchronous operation
Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. The main
features are:
Single channel counter
Clear timer on compare match (auto reload)
Glitch-free, phase correct pulse width modulator (PWM)
Frequency generator
10-bit clock prescaler
Overflow and compare match interrupt sources (TOV2, OCF2A and OCF2B)
Allows clocking from external 32kHz watch crystal independent of the I/O clock
16.1
Overview
A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 16-1. For the actual
placement of I/O pins, see “Pin configurations” on page 3. CPU accessible I/O Registers, includ-
ing I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations
The Power Reduction Timer/Counter2 bit, PRTIM2, in “PRR0 – Power Reduction Register 0” on
page 54 must be written to zero to enable Timer/Counter2 module.
Figure 16-1. 8-bit Timer/Counter, block diagram.
Timer/counter
D
ATA
B
U
S
OCRnA
OCRnB
=
TCNTn
Waveform
generation
Waveform
generation
OCnA
OCnB
=
Fixed
TOP
value
Control logic
= 0
TOP
BOTTOM
Count
Clear
Direction
TOVn
(int.req.)
OCnA
(int.req.)
OCnB
(int.req.)
TCCRnA
TCCRnB
clk
Tn
ASSRn
Synchronization unit
Prescaler
T/C
oscillator
clk
I/O
clk
ASY
asynchronous mode
select (ASn)
Synchronized status flags
TOSC1
TOSC2
Status flags
clk
I/O
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