參數(shù)資料
型號: MR80C52TXXX-30SBD
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQCC44
封裝: LCC-44
文件頁數(shù): 117/141頁
文件大?。?/td> 7628K
代理商: MR80C52TXXX-30SBD
47
2486AA–AVR–02/2013
ATmega8(L)
Note:
1. The Boot Reset Address is shown in Table 82 on page 213. For the BOOTRST Fuse “1”
means unprogrammed while “0” means programmed
The most typical and general program setup for the Reset and Interrupt Vector Addresses in
ATmega8 is:
addressLabels Code
Comments
$000
rjmp
RESET
; Reset Handler
$001
rjmp
EXT_INT0
; IRQ0 Handler
$002
rjmp
EXT_INT1
; IRQ1 Handler
$003
rjmp
TIM2_COMP
; Timer2 Compare Handler
$004
rjmp
TIM2_OVF
; Timer2 Overflow Handler
$005
rjmp
TIM1_CAPT
; Timer1 Capture Handler
$006
rjmp
TIM1_COMPA
; Timer1 CompareA Handler
$007
rjmp
TIM1_COMPB
; Timer1 CompareB Handler
$008
rjmp
TIM1_OVF
; Timer1 Overflow Handler
$009
rjmp
TIM0_OVF
; Timer0 Overflow Handler
$00a
rjmp
SPI_STC
; SPI Transfer Complete Handler
$00b
rjmp
USART_RXC
; USART RX Complete Handler
$00c
rjmp
USART_UDRE
; UDR Empty Handler
$00d
rjmp
USART_TXC
; USART TX Complete Handler
$00e
rjmp
ADC
; ADC Conversion Complete Handler
$00f
rjmp
EE_RDY
; EEPROM Ready Handler
$010
rjmp
ANA_COMP
; Analog Comparator Handler
$011
rjmp
TWSI
; Two-wire Serial Interface Handler
$012
rjmp
SPM_RDY
; Store Program Memory Ready Handler
;
$013
RESET: ldi
r16,high(RAMEND); Main program start
$014
out
SPH,r16
; Set Stack Pointer to top of RAM
$015
ldi
r16,low(RAMEND)
$016
out
SPL,r16
$017
sei
; Enable interrupts
$018
<instr>
xxx
...
Table 19. Reset and Interrupt Vectors Placement
BOOTRST(1)
IVSEL
Reset Address
Interrupt Vectors Start Address
1
0
0x000
0x001
1
0x000
Boot Reset Address + 0x001
0
Boot Reset Address
0x001
0
1
Boot Reset Address
Boot Reset Address + 0x001
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