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參數(shù)資料
| 型號： | MR80C52EXXX-36/883:RD |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44 |
| 封裝： | LCC-44 |
| 文件頁數(shù)： | 5/91頁 |
| 文件大?。?/td> | 19688K |
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110
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
13.10 16-bit Timer/Counter Register Description
13.10.1 Timer/Counter1 Control Register A – TCCR1A
Bit 7:6 – COMnA1:0: Compare Output Mode for Channel A
Bit 5:4 – COMnB1:0: Compare Output Mode for Channel B
The COMnA1:0 and COMnB1:0 control the output compare pins (OCnA and OCnB respectively) behavior. If one or both of the
COMnA1:0 bits are written to one, the OCnA output overrides the normal port functionality of the I/O pin it is connected to. If one
or both of the COMnB1:0 bit are written to one, the OCnB output overrides the normal port functionality of the I/O pin it is
connected to. However, note that the Data Direction Register (DDR) bit corresponding to the OCnA or OCnB pin must be set in
order to enable the output driver.
When the OCnA or OCnB is connected to the pin, the function of the COMnx1:0 bits is dependent of the WGMn3:0 bits setting.
Table 13-1 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to a Normal or a CTC mode (non-PWM).
Table 13-2 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the fast PWM mode.
Note:
1.
A special case occurs when OCRnA/OCRnB equals TOP and COMnA1/COMnB1 is set. In this case the compare
match is ignored, but the set or clear is done at TOP. See Section 13.8.3 “Fast PWM Mode” on page 103 for more
details.
Bit
7654
3
2
1
0
COM1A1
COM1A0
COM1B1
COM1B0
–
WGM11
WGM10
TCCR1A
Read/Write
R/W
R
R/W
Initial Value
0000
0
Table 13-1. Compare Output Mode, non-PWM
COMnA1/COMnB1
COMnA0/COMnB0
Description
0
Normal port operation, OCnA/OCnB disconnected.
0
1
Toggle OCnA/OCnB on compare match.
1
0
Clear OCnA/OCnB on compare match (set output to low level).
1
Set OCnA/OCnB on compare match (set output to high level).
Table 13-2. Compare Output Mode, Fast PWM(1)
COMnA1/COMnB1
COMnA0/COMnB0
Description
0
Normal port operation, OCnA/OCnB disconnected.
0
1
WGMn3:0 = 14 or 15: Toggle OC1A on compare match, OC1B
disconnected (normal port operation). For all other WGM1 settings,
normal port operation, OC1A/OC1B disconnected.
1
0
Clear OCnA/OCnB on compare match, set OCnA/OCnB at TOP
1
Set OCnA/OCnB on compare match, clear OCnA/OCnB at TOP
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MR80C52TXXX-20SHXXX:R | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44 |
| MR80C52XXX-36/883:RD | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44 |
| MD83C154TXXX-20P883 | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CDIP40 |
| MR80C52EXXX-36SHXXX:D | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44 |
| MR83C154CXXX-12/883 | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MR80C86 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86/B | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述:Microprocessor, 16 Bit, 44 Pin, Ceramic, LCC |
| MR80C86-2 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86-2/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MR80C86-2/B | 制造商:Intersil Corporation 功能描述:MPU 80C86 16BIT CMOS 8MHZ 44PLCC - Rail/Tube |
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