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| 型號(hào)： | MR80C52EXXX-12/883:R |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| 文件頁(yè)數(shù)： | 55/141頁(yè) |
| 文件大?。?/td> | 7628K |
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232
8021G–AVR–03/11
ATmega329P/3290P
To energize a segment, an absolute voltage above a certain threshold must be applied. This is
done by letting the output voltage on corresponding COM pin and SEG pin have opposite phase.
For display with more than one common, one (1/2 bias) or two (1/3 bias) additional voltage lev-
els must be applied. Otherwise, non-energized segments on COM0 would be energized for all
non-selected common.
Addressing COM0 starts a frame by driving opposite phase with large amplitude out on COM0
compared to none addressed COM lines. Non-energized segments are in phase with the
addressed COM0, and energized segments have opposite phase and large amplitude. For
waveform figures refer to ”Mode of Operation” on page 233. Latched data from LCDDR4 -
LCDDR0 is multiplexed into the decoder. The decoder is controlled from the LCD timing and
sets up signals controlling the analog switches to produce an output waveform. Next, COM1 is
addressed, and latched data from LCDDR9 - LCDDR5 is input to decoder. Addressing continu-
ous until all COM lines are addressed according to number of common (duty). The display data
are latched before a new frame start.
23.2.5
LCD Contrast Controller/Power Supply
The peak value (V
LCD) on the output waveform determines the LCD Contrast. VLCD is controlled
by software from 2.6V to 3.35V independent of V
CC. An internal signal inhibits output to the LCD
until V
LCD has reached its target value.
23.2.6
LCDCAP
An external capacitor (typical > 470 nF) must be connected to the LCDCAP pin as shown in Fig-
ure 23-2, if the LCD module is enabled and configured to use internal power. This capacitor acts
as a reservoir for LCD power (V
LCD). A large capacitance reduces ripple on VLCD but increases
the time until V
LCD reaches its target value.
Figure 23-2. LCDCAP Connection
23.2.7
LCD Buffer Driver
Intermediate voltage levels are generated from buffers/drivers. The buffers are active the
amount of time specified by LCDDC[2:0] in LCDCCR. Then LCD output pins are tri-stated and
buffers are switched off. Shortening the drive time will reduce power consumption, but displays
with high internal resistance or capacitance may need longer drive time to achieve sufficient
contrast.
23.2.8
Display requirements
When using more than one common pin, the maximum period the LCD drivers can be turned on
for each voltage transition on the LCD pins is 50% of the prescaled LCD clock period, clk
LCD_PS.
To avoid flickering, it is recommended to keep the framerate above 30Hz, thus giving a maxi-
3
2
1
64
63
62
LCDCAP
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MR80C52XXX-12 | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| MF180C51T-12D | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44 |
| MR80C32-12:D | 8-BIT, 12 MHz, MICROCONTROLLER, CQCC44 |
| MR80C32E-36:D | 8-BIT, 36 MHz, MICROCONTROLLER, CQCC44 |
| MR80C52TXXX-16SHXXX:R | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MR80C86 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86/B | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述:Microprocessor, 16 Bit, 44 Pin, Ceramic, LCC |
| MR80C86-2 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 16-Bit Microprocessor |
| MR80C86-2/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MR80C86-2/B | 制造商:Intersil Corporation 功能描述:MPU 80C86 16BIT CMOS 8MHZ 44PLCC - Rail/Tube |
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