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型號：	MR80C52CXXX-20SCR
廠商：	ATMEL CORP
元件分類：	微控制器/微處理器
英文描述：	8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
封裝：	LCC-44
文件頁數(shù)：	18/963頁
文件大?。?/td>	11933K
代理商：	MR80C52CXXX-20SCR

32142D–06/2013

ATUC64/128/256L3/4U

Device Global Interrupt Register

Register Name:

Access Type:

Reset Value:

1. EPnINT bits are within the range from EP0INT to EP6INT.

EPnINT: Endpoint n Interrupt

This bit is cleared when the interrupt source is serviced.

This bit is set when an interrupt is triggered by the endpoint n (UESTAn, UECONn). This triggers a USB interrupt if EPnINTE is

UPRSM: Upstream Resume Interrupt

This bit is cleared when the UDINTCLR.UPRSMC bit is written to one to acknowledge the interrupt (USB clock inputs must be

enabled before).

This bit is set when the USBC sends a resume signal called “Upstream Resume”. This triggers a USB interrupt if UPRSME is

EORSM: End of Resume Interrupt

This bit is cleared when the UDINTCLR.EORSMC bit is written to one to acknowledge the interrupt.

This bit is set when the USBC detects a valid “End of Resume” signal initiated by the host. This triggers a USB interrupt if

EORSME is one.

WAKEUP: Wakeup Interrupt

This bit is cleared when the UDINTCLR.WAKEUPC bit is written to one to acknowledge the interrupt (USB clock inputs must be

enabled before) or when the Suspend (SUSP) interrupt bit is set.

This bit is set when the USBC is reactivated by a filtered non-idle signal from the lines (not by an upstream resume). This

triggers an interrupt if WAKEUPE is one.

This interrupt is generated even if the clock is frozen by the FRZCLK bit.

EORST: End of Reset Interrupt

This bit is cleared when the UDINTCLR.EORSTC bit is written to one to acknowledge the interrupt.

This bit is set when a USB “End of Reset” has been detected. This triggers a USB interrupt if EORSTE is one.

SOF: Start of Frame Interrupt

This bit is cleared when the UDINTCLR.SOFC bit is written to one to acknowledge the interrupt.

This bit is set when a USB “Start of Frame” PID (SOF) has been detected (every 1 ms). This triggers a USB interrupt if SOFE is

one. The FNUM field is updated.

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相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
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