參數(shù)資料
型號： MR80C32E-12/883:D
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 12 MHz, MICROCONTROLLER, CQCC44
文件頁數(shù)： 3/46頁
文件大?。?/td> 7004K
135
7593L–AVR–09/12
AT90USB64/128
Figure 15-11. Timer/Counter timing diagram, setting of OCFnx, with prescaler (f
clk_I/O/8).
Figure 15-12 shows the count sequence close to TOP in various modes. When using phase and
frequency correct PWM mode the OCRnx Register is updated at BOTTOM. The timing diagrams
will be the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and so on.
The same renaming applies for modes that set the TOVn Flag at BOTTOM.
Figure 15-12. Timer/Counter timing diagram, no prescaling.
Figure 15-13 on page 136 shows the same timing data, but with the prescaler enabled.
OCFnx
OCRnx
TCNTn
OCRnx value
OCRnx - 1
OCRnx
OCRnx + 1
OCRnx + 2
clk
I/O
clk
Tn
(clk
I/O/8)
TOVn (FPWM)
and ICFn (if used
as TOP)
OCRnx
(update at TOP)
TCNTn
(CTC and FPWM)
TCNTn
(PC and PFC PWM)
TOP - 1
TOP
TOP - 1
TOP - 2
Old OCRnx value
New OCRnx value
TOP - 1
TOP
BOTTOM
BOTTOM + 1
clk
Tn
(clk
I/O/1)
clk
I/O
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