參數(shù)資料
型號: MR80C32-36:RD
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 36 MHz, MICROCONTROLLER, CQCC44
封裝: LCC-44
文件頁數(shù): 14/120頁
文件大?。?/td> 25028K
110
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
Bit 0 – TOV0: Timer/Counter0 Overflow Flag
The bit TOV0 is set when an overflow occurs in Timer/Counter0. TOV0 is cleared by hardware
when executing the corresponding interrupt handling vector. Alternatively, TOV0 is cleared by
writing a logic one to the flag. When the SREG I-bit, TOIE0 (Timer/Counter0 Overflow Interrupt
Enable), and TOV0 are set, the Timer/Counter0 Overflow interrupt is executed.
The setting of this flag is dependent of the WGM02:0 bit setting. Refer to Table 15-8, ”Waveform
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