![](http://datasheet.mmic.net.cn/30000/MR80C32-20-D_datasheet_2377239/MR80C32-20-D_166.png)
166
8154B–AVR–07/09
ATmega16A
Note:
The assembly code example returns the UCSRC value in r16.
Reading the UBRRH contents is not an atomic operation and therefore it can be read as an ordi-
nary register, as long as the previous instruction did not access the register location.
19.10.3
Register Description
19.10.4
UDR – USART I/O Data Register
The USART Transmit Data Buffer Register and USART Receive Data Buffer Registers share the
same I/O address referred to as USART Data Register or UDR. The Transmit Data Buffer Reg-
ister (TXB) will be the destination for data written to the UDR Register location. Reading the
UDR Register location will return the contents of the Receive Data Buffer Register (RXB).
For 5-, 6-, or 7-bit characters the upper unused bits will be ignored by the Transmitter and set to
zero by the Receiver.
The transmit buffer can only be written when the UDRE Flag in the UCSRA Register is set. Data
written to UDR when the UDRE Flag is not set, will be ignored by the USART Transmitter. When
data is written to the transmit buffer, and the Transmitter is enabled, the Transmitter will load the
data into the transmit Shift Register when the Shift Register is empty. Then the data will be seri-
ally transmitted on the TxD pin.
The receive buffer consists of a two level FIFO. The FIFO will change its state whenever the
receive buffer is accessed. Due to this behavior of the receive buffer, do not use read modify
write instructions (SBI and CBI) on this location. Be careful when using bit test instructions (SBIC
and SBIS), since these also will change the state of the FIFO.
USART_ReadUCSRC:
; Read UCSRC
in
r16,UBRRH
in
r16,UCSRC
ret
unsigned char
USART_ReadUCSRC( void )
{
unsigned char
ucsrc;
/* Read UCSRC */
ucsrc = UBRRH;
ucsrc = UCSRC;
return ucsrc;
}
Bit
7
65
43
21
0
RXB[7:0]
UDR (Read)
TXB[7:0]
UDR (Write)
Read/Write
R/W
Initial Value
0