117
32000D–04/2011
AVR32
9.3.9.3
Multiple data
9.3.10
System/Control
stswp.h
E
Rp[disp], Rs
Swap bytes and store halfword with
displacement.
Temp
← Rs[7:0], Rs[15:8]
*(Rp+(SE(disp12) << 1)
← Temp
1
stswp.w
E
Swap bytes and store word with
displacement.
Temp[31:24]
← Rs[7:0],
Temp[23:16]
← Rs[15:8],
Temp[15:8]
← Rs[23:16],
Temp[7:0]
← Rs[31:24]
*(Rp+(SE(disp12) << 2)
← Temp
1
xchg
E
Rd, Rx, Ry
Exchange register and memory
See Instruction Set Reference
1
Table 9-10.
Load/Store Operations (Continued)
Table 9-11.
Mutiple data
Mnemonics
Operands / Syntax
Description
Operation
Rev
ldm
E
Rp{++}, Reglist16
{, R12={-1,0,1}}
Load multiple registers. R12 is tested if PC
is loaded.
See Instruction Set Reference
1
ldmts
E
Rp{++}, Reglist16
Load multiple registers in application
context for task switch.
See Instruction Set Reference
1
popm
C
Reglist8 {, R12={-
1,0,1}}
Pop multiple registers from stack. R12 is
tested if PC is popped.
See Instruction Set Reference
1
pushm
C
Reglist8
Push multiple registers to stack.
See Instruction Set Reference
1
stm
E
{--}Rp, Reglist16
Store multiple registers.
See Instruction Set Reference
1
stmts
E
{--}Rp, Reglist16
Store multiple registers in application
context for task switch.
See Instruction Set Reference
1
Table 9-12.
System/Control
Mnemonics
Operands / Syntax
Description
Operation
Rev
breakpoint
C
Breakpoint.
See Instruction Set Reference
1
cache
E
Rp[disp], Op
Perform cache operation
See Instruction Set Reference
1
csrf
C
bp
Clear status register flag.
SR[bp5]
← 01
csrfcz
C
bp
Copy status register flag to C and Z.
C
← SR[bp5]
Z
← SR[bp5]
1
frs
C
frs
Invalidates the return address stack
See Instruction Set Reference
1
mfdr
E
Rd,
DebugRegAddress
Move debug register to Rd.
Rd
←DebugRegister[DebugRegAddr]
1
mfsr
E
Rd, SysRegNo
Move system register to Rd.
Rd
← SystemRegister[SysRegNo]
1
mtdr
E
DebugRegAddress,
Rs
Move Rs to debug register.
DebugRegister[DebugRegAddr]
← Rs
1
mtsr
E
SysRegNo, Rs
Move Rs to system register.
SystemRegister[SysRegNo]
← Rs
1
musfr
C
Rs
Move Rs to status register
SR[3:0]
← Rs[3:0]
1
mustr
C
Rd
Move status register to Rd
Rd
← ZE(SR[3:0])
1