
35
7734Q–AVR–02/12
AT90PWM81/161
5.3
Dynamic Clock Switch
5.3.1
Features
AT90PWM81/161 provides a powerful dynamic clock switch that allows users to turn on and off
clocks of the device on the fly. The built-in de-glitching circuitry allows clocks to be enabled or
disabled asynchronously. This enables efficient power management schemes to be imple-
mented easily and quickly. In a safety application, the dynamic clock switch circuit may
continuously monitor the external clock fails.
The AT90PWM81/161 provides one register for Clock Fuse substitution (CLKSELR) and one
register to control the dynamic clock switch circuit (CLKCSR). The watchdog is used to monitor
external clock source if needed. The control of the dynamic clock switch circuit must be super-
vised by software. The low level control is performed by hardware through the CLKCSR register.
The features are:
Safe commands, to avoid unintentional commands, a special write procedure must be
Exclusive action, the actions are controlled by a decoding (command table). The main
commands of the dynamic clock switching are:
–‘Disable Clock Source’,
–‘Enable Clock Source’,
–‘Request for Clock Availability’,
–‘Clock Source Switching’,
–‘Recover System Clock Source’.
Status, a status on the availability of the enabled clock and the code recovering of clock
source used to drive the system clock are provided.
5.3.2
Fuses substitution
During reset, bits of the Low Fuse Byte are latched in the CLKSELR register. The content of this
register can operate as well as the Low Fuse Byte. CKSEL3..0, SUT1..0 and CKOUT fuses are
substituted as shown in
Figure 5-5 and replaced respectively by CSEL3..0, CSUT1:0 and
COUT.
5.3.3
Clock Source Selection