159
8006K–AVR–10/10
ATtiny24/44/84
19. Memory Programming
This section describes the different methods for programming ATtiny24/44/84 memories.
19.1
Program And Data Memory Lock Bits
The ATtiny24/44/84 provides two lock bits which can be left unprogrammed (“1”) or can be pro-
grammed (“0”) to obtain the additional security listed in
Table 19-2. The lock bits can only be
erased to “1” with the Chip Erase command.
The device has no separate boot loader section. The SPM instruction is enabled for the whole
Flash, if the SELFPRGEN fuse is programmed (“0”), otherwise it is disabled.
Program memory can be read out via the debugWIRE interface when the DWEN fuse is pro-
grammed, even if lock bits are set. Thus, when lock bit security is required, debugWIRE should
always be disabled by clearing the DWEN fuse.
Note:
“1” means unprogrammed, “0” means programmed.
Notes:
1. Program fuse bits before programming LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
Table 19-1.
Lock Bit Byte
Lock Bit
Bit No
Description
Default Value
7
–
1 (unprogrammed)
6
–
1 (unprogrammed)
5
–
1 (unprogrammed)
4
–
1 (unprogrammed)
3
–
1 (unprogrammed)
2
–
1 (unprogrammed)
LB2
1
Lock bit
1 (unprogrammed)
LB1
0
Lock bit
1 (unprogrammed)
Table 19-2.
Lock Bit Protection Modes.
Memory Lock Bits
Protection Type
LB Mode
LB2
LB1
1
No memory lock features enabled.
21
0
Further programming of the Flash and EEPROM is disabled in
High-voltage and Serial Programming mode. The Fuse bits are
locked in both Serial and High-voltage Programming mode.
debugWire is disabled.
30
0
Further programming and verification of the Flash and EEPROM
is disabled in High-voltage and Serial Programming mode. The
Fuse bits are locked in both Serial and High-voltage
Programming mode.
(1) debugWire is disabled.