• 參數(shù)資料
    型號: MQ80C52EXXX-25/883:RD
    廠商: TEMIC SEMICONDUCTORS
    元件分類: 微控制器/微處理器
    英文描述: 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQFP44
    文件頁數(shù): 78/134頁
    文件大?。?/td> 3805K
    48
    8068U–AVR–06/2013
    XMEGA A3
    Not recommended for new designs -
    Use XMEGA A3U series
    29. Program and Debug Interfaces
    29.1
    Features
    PDI - Program and Debug Interface (Atmel proprietary 2-pin interface)
    JTAG Interface (IEEE std. 1149.1 compliant)
    Boundary-scan capabilities according to the IEEE Std. 1149.1 (JTAG)
    Access to the OCD system
    Programming of Flash, EEPROM, Fuses and Lock Bits
    29.2
    Overview
    The programming and debug facilities are accessed through the JTAG and PDI physical inter-
    faces. The PDI physical interface uses one dedicated pin together with the Reset pin, and no
    general purpose pins are used. JTAG uses four general purpose pins on PORTB.
    The PDI is an Atmel proprietary protocol for communication between the microcontroller and
    Atmel’s or third party development tools.
    29.3
    IEEE 1149.1 (JTAG) Boundary-scan
    The JTAG physical layer handles the basic low-level serial communication over four I/O lines
    named TMS, TCK, TDI, and TDO. It complies to the IEEE Std. 1149.1 for test access port and
    boundary scan.
    29.3.1
    Boundary-scan Order
    Table 30-8 on page 53 shows the Scan order between TDI and TDO when the Boundary-scan
    chain is selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit scanned
    out. The scan order follows the pin-out order. Bit 4, 5, 6 and 7 of Port B is not in the scan chain,
    since these pins constitute the TAP pins when the JTAG is enabled.
    29.3.2
    Boundary-scan Description Language Files
    Boundary-scan Description Language (BSDL) files describe Boundary-scan capable devices in
    a standard format used by automated test-generation software. The order and function of bits in
    the Boundary-scan Data Register are included in this description. BSDL files are available for
    ATxmega256/192/128/64A3 devices.
    See Table 30-8 on page 53 for ATxmega256/192/128/64A3 Boundary Scan Order.
    相關(guān)PDF資料
    PDF描述
    MQ80C52TXXX-12SHXXX:RD 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQFP44
    MQ80C52TXXX-25:R 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQFP44
    MQ80C52EXXX-12/883:RD 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQFP44
    MC80C52XXX-30SHXXX:D 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CDIP40
    MR80C52CXXX-16SHXXX:RD 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44
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