135
7799D–AVR–11/10
ATmega8U2/16U2/32U2
16.11.5
OCR1AH and OCR1AL – Output Compare Register 1 A
16.11.6
OCR1BH and OCR1BL – Output Compare Register 1 B
16.11.7
OCR1CH and OCR1CL – Output Compare Register 1 C
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16.11.8
ICR1H and ICR1L – Input Capture Register 1
IThe Input Capture is updated with the counter (TCNTn) value each time an event occurs on the
ICPn pin (or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture
can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit
16.11.9
TIMSK1 – Timer/Counter1 Interrupt Mask Register
Bit
76543210
OCR1A[15:8]
OCR1AH
OCR1A[7:0]
OCR1AL
Read/Write
R/W
Initial Value
0
Bit
76543210
OCR1B[15:8]
OCR1BH
OCR1B[7:0]
OCR1BL
Read/Write
R/W
Initial Value
0
Bit
76543210
OCR1C[15:8]
OCR1CH
OCR1C[7:0]
OCR1CL
Read/Write
R/W
Initial Value
0
Bit
76543210
ICR1[15:8]
ICR1H
ICR1[7:0]
ICR1L
Read/Write
R/W
Initial Value
0
Bit
76543
2
1
0
–
ICIE1
–
OCIE1C
OCIE1B
OCIE1A
TOIE1
TIMSK1
Read/Write
R
R/W
R
R/W
Initial Value
00000
0