- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45377 > MQ80C52CXXX-20/883R (ATMEL CORP) 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44 PDF資料下載
參數(shù)資料
| 型號： | MQ80C52CXXX-20/883R |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44 |
| 封裝： | CERAMIC, QFP-44 |
| 文件頁數(shù)： | 71/101頁 |
| 文件大?。?/td> | 3398K |
| 代理商： | MQ80C52CXXX-20/883R |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁當前第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁
94
Figure 7-2. High Date Rate Frame Structure
Due to the overhead caused by the PPDU header and the FCS, the effective data rate
is less than the selected data rate, depending on the length of the PSDU. A graphical
representation of the effective data rate is shown in Figure 7-3.
Figure 7-3. Effective Data Rate of the O-QPSK Modes
0
20
40
60
80
100
120
0
100
200
300
400
500
600
700
800
900
B
[
k
b
it
/s
]
PSDU length in octets
Netto bit rate B
1000 kbit/s
500 kbit/s
250 kbit/s
400 kbit/s
200 kbit/s
100 kbit/s
Consequently, high data rate transmission is useful for large PSDU lengths due to the
higher effective data rate, or in order to reduce the power consumption of the system.
7.1.4.3 High Date Rate Mode Options
Reduced Acknowledgment Time
If register bit AACK_ACK_TIME (register 0x17, XAH_CTRL_1) is set, the
acknowledgment time is reduced to the duration of 2 symbol periods for 200 and 400
kbit/s, and to 3 symbol periods for 500 and 1000 kbit/s, refer to Table 5-24. Otherwise, it
defaults to 12 symbol periods according to IEEE 802.15.4.
Receiver Sensitivity Control
The different data rates between PPDU header (SHR and PHR) and PHY payload
(PSDU) cause a different sensitivity between header and payload. This can be adjusted
by defining sensitivity threshold levels of the receiver. With a sensitivity threshold level
set, the AT86RF212 does not synchronize to frames with an RSSI level below that
threshold. Refer to section 7.2.3 for a configuration of the sensitivity threshold with
register 0x15 (RX_SYN).
AT86RF212
8168C-MCU Wireless-02/10
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MJ80C31U-36:D | MICROCONTROLLER |
| R80C52XXX-12SHXXX | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| MQ80C32-12SBR | 8-BIT, 12 MHz, MICROCONTROLLER, CQFP44 |
| IF180C52XXX-36D | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, PQFP44 |
| IV80C32XXX-36 | 8-BIT, 36 MHz, MICROCONTROLLER, PQFP44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MQ82370-20 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MQ8238020 | 制造商:Intel 功能描述:CONTROLLER: OTHER |
| MQ82380-20 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MQ82380-20/R | 制造商:Rochester Electronics LLC 功能描述: |
| MQ82592 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。