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8011Q–AVR–02/2013
ATmega164P/324P/644P
When OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the
WGM22:0 bit setting.
Table 14-5 shows the COM2B1:0 bit functionality when the WGM22:0 bits
are set to a normal or CTC mode (non-PWM).
Table 14-6 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM
mode.
Note:
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
Table 14-7 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
rect PWM mode.
Note:
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
Bits 3:2 – Res: Reserved Bits
These bits are reserved bits in the ATmega164P/324P/644P and will always read as zero.
Table 14-5.
Compare Output Mode, non-PWM Mode
COM2B1
COM2B0
Description
0
Normal port operation, OC2B disconnected.
0
1
Toggle OC2B on Compare Match
1
0
Clear OC2B on Compare Match
1
Set OC2B on Compare Match
Table 14-6.
Compare Output Mode, Fast PWM M
odeCOM2B1
COM2B0
Description
0
Normal port operation, OC2B disconnected.
01
Reserved
10
Clear OC2B on Compare Match, set OC2B at BOTTOM,
(non-inverting mode).
11
Set OC2B on Compare Match, clear OC2B at BOTTOM,
(inverting mode).
Table 14-7.
Compare Output Mode, Phase Correct PWM Mode
(1)COM2B1
COM2B0
Description
0
Normal port operation, OC2B disconnected.
01
Reserved
10
Clear OC2B on Compare Match when up-counting. Set OC2B on
Compare Match when down-counting.
11
Set OC2B on Compare Match when up-counting. Clear OC2B on
Compare Match when down-counting.