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8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
25.6
Atmel ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P Boundary-scan order
Table 25-1 shows the Scan order between TDI and TDO when the Boundary-scan chain is
selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit scanned out. The
scan order follows the pin-out order as far as possible. Therefore, the bits of Port A and Port K is
scanned in the opposite bit order of the other ports. Exceptions from the rules are the Scan
chains for the analog circuits, which constitute the most significant bits of the scan chain regard-
corresponds to FF0, PXn. Control corresponds to FF1, PXn. Bit 4, 5, 6, and 7 of Port F is not in
the scan chain, since these pins constitute the TAP pins when the JTAG is enabled.
Table 25-1.
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P Boundary-scan
order.
Bit number
Signal name
Module
56
PB0.Data
Port B
55
PB0.Control
54
PB1.Data
53
PB1.Control
52
PB2.Data
51
PB2.Control
50
PB3.Data
49
PB3.Control
48
PB4.Data
47
PB4.Control
46
PB5.Data
45
PB5.Control
44
PB6.Data
43
PB6.Control
42
PB7.Data
41
PB7.Control
40
RSTT
Reset Logic (Observe Only)