參數(shù)資料
型號: MQ80C32E-20SHXXX:D
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 20 MHz, MICROCONTROLLER, CQFP44
文件頁數(shù): 72/80頁
文件大小: 5152K
272
XMEGA A [MANUAL]
8077I–AVR–11/2012
24.9
Register Description EBI
24.9.1 CTRL – Control register
Bit 7:6 – SDDATAW[1:0]: SDRAM Data Width Setting
These bits select the EBI SDRAM data width configuration, according to Table 24-7 on page 272.
Table 24-7. SDRAM mode.
Note:
1.
Eight-bit data bus only available for four-port EBI interface
Bit 5:4 – LPCMODE[1:0]: SRAM Low Pin Count Mode
These bits select the EBI SRAM LPC configuration according to Table 24-8 on page 272.
Table 24-8. SRAM LPC mode.
Bit 3:2 – SRMODE[1:0]: SRAM Mode
These bits selects the EBI SRAM configuration according to Table 24-9 on page 272.
Table 24-9. SRAM mode.
Note:
1.
ALE2 and NOALE only available with 4-port EBI interface
Bit 1:0 – IFMODE[1:0]: Interface Mode
Bit
7
654
321
0
+0x00
SDDATAW[1:0]
LPCMODE[1:0]
SRMODE[1:0]
IFMODE[1:0]
Read/Write
R/W
Initial Value
0
SDDATAW[1:0]
Group Configuration
Description
00
4BIT
Four-bit data bus
01
Reserved
10
Reserved
11
Reserved
LPCMODE[1:0]
Group Configuration
ALE
Description
00
ALE1
Data multiplexed with Address byte 0
01
Reserved
10
ALE1 & 2
Data multiplexed with Address byte 0 and 1
ALE12
11
Reserved
SRMODE[1:0]
Group Configuration
ALE
Description
00
ALE1
Address byte 0 and 1 multiplexed
01
ALE2(1)
ALE2
Address byte 0 and 2 multiplexed
10
ALE1 & 2
Address byte 0, 1 and 2 multiplexed
11
NOALE
No ALE
No address multiplexing
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