
302
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
27.6
Parallel Programming Parameters, Pin Mapping, and Commands
This section describes how to parallel program and verify Flash Program memory, EEPROM
Data memory, Memory Lock bits, and Fuse bits in the Atmel
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P. Pulses are assumed to be at least
250ns unless otherwise noted.
27.6.1
Signal Names
In this section, some pins of the ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P
are referenced by signal names describing their functionality during parallel programming, see
enced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
When pulsing WR or OE, the command loaded determines the action executed. The different
Figure 27-1. Parallel programming
Note:
1. Unused Pins should be left floating.
Table 27-8.
Number of words in a page and number of pages in the EEPROM.
Device
EEPROM size
Page size
PCWORD
No. of pages
PCPAGE
EEAMSB
ATmega164A/ATmega164PA
512bytes
4 bytes
EEA[1:0]
128
EEA[8:2]
8
ATmega324A/ATmega324PA
1KBytes
4 bytes
EEA[1:0]
256
EEA[9:2]
9
ATmega644A/ATmega644PA
2KBytes
8 bytes
EEA[2:0]
256
EEA[10:2]
10
ATmega1284/ATmega1284P
4KBytes
8 bytes
EEA[2:0]
512
EEA[11:3]
11
VCC
+5V
GND
XTAL1
PD1
PD2
PD3
PD4
PD5
PD6
PB7 - PB0
DATA
RESET
PD7
+12 V
BS1
XA0
XA1
OE
RDY/BSY
PAGEL
PA0
WR
BS2
AVCC
+5V