
248
7799D–AVR–11/10
ATmega8U2/16U2/32U2
Note:
1. The SPIEN Fuse is not accessible in serial programming mode.
for details.
4. Never ship a product with the DWEN Fuse programmed regardless of the setting of Lock bits
and RSTDSBL Fuse. A programmed DWEN Fuse enables some parts of the clock system to
be running in all sleep modes. This may increase the power consumption.
Note:
1. The default value of SUT1..0 results in maximum start-up time for the default clock source.
2. The default setting of CKSEL3..0 results in External crystal Oscillator 8MHz. See
Table 8-1 onThe status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
Table 25-4.
Fuse High Byte
Fuse High Byte
Bit No
Description
Default Value : 0xD9
7
Enable debugWIRE (and disable
Reset capability
1 (unprogrammed, debugWIRE
disabled)
RSTDSBL
6
Disable Reset (pin can be used as
general purpose I/O)
1 (unprogrammed, Reset
enabled)
5
Enable Serial Program and Data
Downloading
0 (programmed, SPI prog.
enabled)
4
Watchdog Timer always ON
EESAVE
3
EEPROM memory is preserved
through the Chip Erase
1 (unprogrammed, EEPROM
not preserved)
BOOTSZ1
2
details)
BOOTSZ0
1
details)
BOOTRST
0
Select Bootloader Address as Reset
Vector
1 (unprogrammed, Reset
vector @0x0000)
Table 25-5.
Fuse Low Byte
Fuse Low Byte
Bit No
Description
Default Value : 0x5E
7
Divide clock by 8
0 (programmed)
6
Clock output
1 (unprogrammed)
SUT1
5
Select start-up time
SUT0
4
Select start-up time
CKSEL3
3
Select Clock source
CKSEL2
2
Select Clock source
CKSEL1
1
Select Clock source
CKSEL0
0
Select Clock source