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參數(shù)資料
| 型號： | MPC99J93FAR2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | PLASTIC, LQFP-32 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 213K |
| 代理商： | MPC99J93FAR2 |
MPC99J93
MOTOROLA TIMING SOLUTIONS
4
Table 4. DC CHARACTERISTICS (VCC =3.3V ± 5%, TA =--40° to +85°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
LVCMOS control inputs (MR, PLL_En, Sel_Clk, Man_Override, Alarm_Reset)
VIH
Input High Voltage
2.0
VCC +0.3
V
VIL
Input Low Voltage
0.8
V
IIN
Input Currenta
±100
A
VIN=VCC or GND
LVCMOS control outputs (Clk_selected, Inp0bad, Inp1bad)
VOH
Output High Voltage
2.0
V
IOH=-24 mA
VOL
Output Low Voltage
0.55
V
IOL=24mA
LVPECL clock inputs (CLK0, CLK1, Ext_FB)b
VPP
DC Differential Input Voltagec
0.1
1.3
V
Differential operation
VCMR
Differential Cross Point Voltaged
VCC-1.8
VCC-0.3
V
Differential operation
IIN
Input Currenta
±100
A
VIN=VCC or GND
LVPECL clock outputs (QA[1:0], QB[2:0])
VOH
Output High Voltage
VCC-1.20
VCC-0.95
VCC-0.70
V
Termination 50 to VTT
VOL
Output Low Voltage
VCC-1.90
VCC-1.75
VCC-1.45
V
Termination 50 to VTT
Supply Current
IGND
Maximum Power Supply Current
180
mA
GND pins
ICC_PLL
Maximum PLL Supply Current
15
mA
VCC_PLL pin
a. Inputs have internal pull-up/pull-down resistors affecting the input current.
b. Clock inputs driven by differential LVPECL compatible signals.
c. VPP is the minimum differential input voltage swing required to maintain AC characteristics.
d. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC)
range and the input swing lies within the VPP (DC) specification.
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