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參數(shù)資料
| 型號： | MPC9850VMR2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 500 MHz, PROC SPECIFIC CLOCK GENERATOR, PBGA100 |
| 封裝： | LEAD FREE, MAPBGA-100 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 243K |
| 代理商： | MPC9850VMR2 |
Advanced Clock Drivers Devices
6
Freescale Semiconductor
MPC9850
Table 8. LVDS DC Characteristics (TA = –40°C to 85°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
Differential LVDS Clock Outputs (QC0, QC0 and QC1, QC1) for VDD = 3.3 V ± 5%
VPP
Output Differential Voltage(1) (peak-to-peak)
(LVDS)
1. VPP is the minimum differential input voltage swing required to maintain AC characteristics including tPD and device-to-device skew.
100
400
mV
VOS
Output Offset Voltage
(LVDS)
1050
1600
mV
Table 9. LVPECL DC Characteristics (TA = –40°C to 85°C)(1)
1. AC characteristics are design targets and pending characterization.
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
Differential LVPECL Clock Inputs (CLK1, CLK1) for VDD = 3.3 V ± 0.5%
VPP
Differential Voltage(2) (peak-to-peak)
(LVPECL)
2. VPP is the minimum differential input voltage swing required to maintain AC characteristics including tPD and device-to-device skew.
250
mV
VCMR
Differential Input Crosspoint Voltage(3)
(LVPECL)
3. VCMR (AC) is the crosspoint of the differential input signal. Normal AC operation is obtained when the crosspoint is within the VCMR (AC)
range and the input swing lies within the VPP (AC) specification. Violation of VCMR (AC) or VPP (AC) impacts the device propagation delay,
device and part-to-part skew.
1.0
VDD – 0.6
V
Table 10. LVCMOS I/O DC Characteristics (TA = –40°C to 85°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
LVCMOS for VDD = 3.3 V ± 5%
VIH
Input High Voltage
2.0
VDD + 0.3
V
LVCMOS
VIL
Input Low Voltage
0.8
V
LVCMOS
IIN
Input Current(1)
1. Inputs have pull-down resistors affecting the input current.
± 200
AVIN = VDDL or GND
LVCMOS for VDD = 3.3 V ±5%, VDDOA = 3.3 V ± 5 and VDDOB = 3.3 V ± 5%
VOH
Output High Voltage
2.4
V
IOH = –24 mA
VOL
Output Low Voltage
0.5
V
IOL = 24 mA
ZOUT
Output Impedance
14 – 17
LVCMOS for VDD = 3.3 V ±5%, VDDOA = 2.5 V ± 5% and VDDOB= 2.5 V ± 5%
VOH
Output High Voltage
1.9
V
IOH = –15 mA
VOL
Output Low Voltage
0.4
V
IOL = 15 mA
ZOUT
Output Impedance
18 – 22
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| MPC9865VM | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MPC9865VMR2 | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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