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參數(shù)資料
| 型號： | MPC9449AER2 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK BUFF DVDR MUX 3:15 52LQFP |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 類型： | 扇出緩沖器（分配），除法器，多路復(fù)用器 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:15 |
| 差分 - 輸入:輸出： | 是/無 |
| 輸入： | LVCMOS，LVPECL |
| 輸出： | LVCMOS |
| 頻率 - 最大： | 200MHz |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 52-LQFP |
| 供應(yīng)商設(shè)備封裝： | 52-TQFP（10x10） |
| 包裝： | 帶卷 (TR) |
DATASHEET
3.3 V/2.5 V 1:15 PECL/LVCMOS Clock
Fanout Buffer
MPC9449
NRND
MPC9449 REVISION 6 DECEMBER 21, 2012
1
2012 Integrated Device Technology, Inc.
The MPC9449 is a 3.3 V or 2.5 V compatible, 1:15 clock fanout buffer targeted
for high performance clock tree applications. With output frequencies up to
200 MHz and output skews less than 200 ps the device meets the needs of the
most demanding clock applications.
Features
15 LVCMOS compatible clock outputs
Two selectable LVCMOS and one differential LVPECL compatible clock
inputs
Selectable output frequency divider (divide-by-one and divide-by-two)
Maximum clock frequency of 200 MHz
Maximum clock skew of 200 ps
High-impedance output control
3.3 V or 2.5 V power supply
Drives up to 30 series terminated clock lines
Ambient temperature range –40
C to +85C
52-lead LQFP packaging, Pb-free
Supports clock distribution in networking, telecommunication and computing
applications
Pin and function compatible to MPC949
Functional Description
The MPC9449 is specifically designed to distribute LVCMOS compatible clock
signals up to a frequency of 200 MHz. The device has 15 identical outputs,
organized in four output banks. Each output bank provides a retimed or
frequency divided copy of the input signal with a near zero skew. The output
buffer supports driving of 50
terminated transmission lines on the incident
edge: each output is capable of driving either one parallel terminated or two series terminated transmission lines.
Two selectable LVCMOS compatible clock inputs are available. This feature supports redundant differential clock sources. In
addition, the MPC9449 accepts one differential PECL clock signal. The DSELx pins choose between division of the input
reference frequency by one or two. The frequency divider can be set individually for each of the four output banks. Applying the
OE control will force the outputs into high-impedance mode.
All inputs have an internal pull-up or pull-down resistor preventing unused and open inputs from floating. The device supports
a 2.5 V or 3.3 V power supply and an ambient temperature range of –40
C to +85C. The MPC9449 is pin and function
compatible but performance-enhanced to the MPC949. The device is packaged in a 52-lead LQFP package.
3.5 V/2.5 V 1:15
PECL/LVCMOS
CLOCK FANOUT BUFFER
AE SUFFIX
52-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 848D-03
NRND – Not Recommend for New Designs
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| MPC9449FA | 功能描述:IC CLK BUFF DVDR MUX 3:15 52LQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 時鐘緩沖器，驅(qū)動器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復(fù)用器 電路數(shù):1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| MPC9449FAR2 | 功能描述:IC CLK BUFF DVDR MUX 3:15 52LQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 時鐘緩沖器，驅(qū)動器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復(fù)用器 電路數(shù):1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| MPC94551 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Low Voltage 1:4 CMOS Clock Buffer |
| MPC94551D | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Low Voltage 1:4 CMOS Clock Buffer |
| MPC94551DR2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Low Voltage 1:4 CMOS Clock Buffer |
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