參數(shù)資料
型號(hào): MPC9443
廠商: Motorola, Inc.
元件分類(lèi): FPGA
英文描述: 80000 SYSTEM GATE 1.5 VOLT FPGA
中文描述: 2.5V和3.3V的LVCMOS時(shí)鐘扇出緩沖器
文件頁(yè)數(shù): 1/16頁(yè)
文件大?。?/td> 333K
代理商: MPC9443
SEMICONDUCTOR TECHNICAL DATA
Order Number: MPC9443/D
Rev 2, 05/2002
Motorola, Inc. 2002
The MPC9443 is a 2.5V and 3.3V compatible 1:16 clock distribution
buffer designed for low-voltage high-performance telecom, networking
and computing applications. The device supports 3.3V, 2.5V and dual
supply voltage (mixed-voltage) applications. The MPC9443 offers 16
low-skew outputs which are divided into 4 individually configurable banks.
Each output bank can be individually supplied by 2.5V or 3.3V,
individually set to run at 1X or 1/2X of the input clock frequency or be
disabled (logic low output state). Two selectable LVPECL compatible
inputs support differential clock distribution systems. In addition, one
selectable LVCMOS input is provided for LVCMOS clock distribution
systems. The MPC9443 is specified for the extended temperature range
of –40 to +85
°
C.
Features
Configurable 16 outputs LVCMOS clock distribution buffer
Compatible to single, dual and mixed 3.3V/2.5V voltage supply
Output clock frequency up to 350 MHz
Designed for high-performance telecom, networking and computer
applications
Supports applications requiring clock redundancy
Max. output skew of 250 ps (125 ps within one bank)
Selectable output configurations per output bank
Individually per-bank high–impedance tristate
Output disable (stop in logic low state) control
48 ld LQFP package
Ambient operating temperature range of –40 to 85
°
C
Functional Description
The MPC9443 is a full static design supporting clock frequencies up to 350 MHz. The signals are generated and retimed
on-chip to ensure minimal skew between the four output banks.
Two independent LVPECL compatible clock inputs are available. This feature supports redundant differential clock sources. In
addition, the MPC9443 supports single-ended LVCMOS clock distribution systems. Each of the four output banks can be
individually supplied by 2.5V or 3.3V, supporting mixed voltage applications. The FSELx pins choose between division of the
input reference frequency by one or two. The frequency divider can be set individually for each output bank. The MPC9443 output
banks are in high–impedance state by deasserting the OEN pins. Asserting OEN will the enable output banks. Please see the
Output High–Impedance Control table on page 4 for details. The outputs can be synchronously stopped (logic low state). The
outputs provide LVCMOS compatible levels with the capability to drive terminated 50
transmission lines. For series terminated
transmission lines, each of the MPC9443 outputs can drive one or two traces giving the devices an effective fanout of 1:32 at VCC
= 3.3V. The device is packaged in a 7x7 mm2 48-lead LQFP package.
LOW VOLTAGE SUPPLY 2.5V
AND 3.3V LVCMOS CLOCK
FANOUT BUFFER
FA SUFFIX
48–LEAD LQFP PACKAGE
CASE 932–03
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料
PDF描述
MPC9447 80000 SYSTEM GATE 1.5 VOLT FPGA
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MPC9449 3.3V / 2.5 V 1:15 PECL/LVCMOS
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC9443AE 功能描述:時(shí)鐘緩沖器 2.5 3.3V 250MHz Clock Generator RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
MPC9443AER2 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 FSL 1-16 LVCMOS Fanout Buffer RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類(lèi)型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
MPC9443FA 功能描述:時(shí)鐘緩沖器 2.5 3.3V 250MHz Clock Generator RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
MPC9443FAR2 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 FSL 1-16 LVCMOS Fanout Buffer RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類(lèi)型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
MPC9446 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:2.5V and 3.3V LVCMOS Clock Fanout Buffer