參數(shù)資料
型號(hào): MPC9109FA
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 9109 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
封裝: 7 X 7 MM, 0.80 MM PITCH, TQFP-32
文件頁(yè)數(shù): 1/5頁(yè)
文件大小: 85K
代理商: MPC9109FA
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
565
Freescale Semiconductor, Inc.
TECHNICAL DATA
Order number: MPC9109
Rev 1, 03/1999
Low Voltage 1:18 Clock
Distribution Chip
The MPC9109 is a 1:18 low voltage clock distribution chip with 2.5 V or
3.3 V LVCMOS output capabilities. The device features the capability to select
either a differential LVPECL or an LVCMOS compatible input. The 18 outputs
are 2.5 V or 3.3 V LVCMOS compatible and feature the drive strength to drive
50
series or parallel terminated transmission lines. With output-to-output
skews of 200 ps, the MPC9109 is ideal as a clock distribution chip for the most
demanding of synchronous systems. The 2.5 V outputs also make the device
ideal for supplying clocks for a high performance Pentium II
microprocessor
based design. For a higher performance version of the 9109 refer to the
MPC940L data sheet.
Features
LVPECL or LVCMOS clock input
2.5 V LVCMOS outputs for Pentium II microprocessor support
200 ps maximum output-to-output skew @ 3.3 V output
Maximum output frequency of 250 MHz @ 3.3 V core
32-lead QFP packaging
Dual or single supply device:
Dual VCC supply voltage, 3.3 V core and 2.5 V output
Single 3.3 V VCC supply voltage for 3.3 V outputs
Single 2.5 V VCC supply voltage for 2.5 V I/O
Functional Description
With a low output impedance (
≈20 ), in both the HIGH and LOW logic states, the output buffers of the MPC9109 are ideal for
driving series terminated transmission lines. With a 20
output impedance the 9109 has the capability of driving two series terminated
lines from each output. This gives the device an effective fanout of 1:36. If a lower output impedance is desired please see the
MPC942 data sheet. If better performance is desired please see the MPC940L data sheet.
The differential LVPECL inputs of the MPC9109 allow the device to interface directly with a LVPECL fanout buffer like the
MC100EP111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS input provides a more
standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In addition, the two clock
sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH on the LVCMOS_CLK_Sel
pin will select the LVCMOS level clock input. All inputs of the MPC9109 have internal pullup/pulldown resistor so they can be left open
if unused.
The MPC9109 is a single or dual supply device. The device power supply offers a high degree of flexibility. The device can operate
with a 3.3 V core and 3.3 V output, a 3.3 V core and 2.5 V outputs as well as a 2.5 V core and 2.5 V outputs. The 32-lead QFP package
was chosen to optimize performance, board space and cost of the device. The 32-lead TQFP has a 7x7mm body size with a conser-
vative 0.8 mm pin spacing.
Pentium II is a trademark of Intel Corporation.
MPC9109
FA SUFFIX
32-LEAD QFP PACKAGE
CASE 873A-03
LOW VOLTAGE
1:18 CLOCK
DISTRIBUTION CHIP
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