- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4072 > MPC885ZP133 (Freescale Semiconductor)IC MPU POWERQUICC 133MHZ 357PBGA PDF資料下載
參數(shù)資料
| 型號(hào)： | MPC885ZP133 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 84/87頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC 133MHZ 357PBGA |
| 標(biāo)準(zhǔn)包裝： | 44 |
| 系列： | MPC8xx |
| 處理器類型： | 32-位 MPC8xx PowerQUICC |
| 速度： | 133MHz |
| 電壓： | 3.3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 357-BBGA |
| 供應(yīng)商設(shè)備封裝： | 357-PBGA（25x25） |
| 包裝： | 托盤 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)當(dāng)前第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)
MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
Freescale Semiconductor
85
Document Revision History
17 Document Revision History
Table 40 lists significant changes between revisions of this hardware specification.
Table 40. Document Revision History
Revision
Number
Date
Changes
7
07/2010
In Table 9, “Bus Operation Timings,” changed the following:
Updated TRLX condition value for B22a/b/c to “TRLX = [0 or 1]”
Removed TRLX condition for B23
Updated condition and equation for B30 to “Invalid GPCM read/write access
(MIN = 0.25
× B1 – 2.00)”
Updated note 8 to “The timing B30 refers to CS when ACS = 00 and to CS and WE(0:3) when
CSNT = 0.”
6
05/2010
Added minimum load for CLKOUT in Section 10, “Bus Signal Timing.”
5
03/2009
Updated formatting of Table 12 , “PCMCIA Port Timing,” Table 13, “Debug Port Timing,” Table 14,
4
08/2007
On page 1, updated first paragraph and added a second paragraph.
After Table 2, inserted a new figure showing the undershoot/overshoot voltage (Figure 3) and
renumbered the rest of the figures.
In Table 9, for reset timings B29f and B29g added footnote indicating that the formula only applies
to bus operation up to 50 MHz.
In Figure 6, changed all reference voltage measurement points from 0.2 and 0.8 V to 50% level.
In Table 18, changed num 46 description to read, “TA assertion to rising edge ...”
In Figure 49, changed TA to reflect the rising edge of the clock.
3.0
7/22/2004
Added sentence to Spec B1A about EXTCLK and CLKOUT being in Alignment for Integer Values
Added a footnote to Spec 41 specifying that EDM = 1
Added RMII1_EN under M1II_EN in Table 36 Pin Assignments
Added a tablefootnote to Table 6 DC Electrical Specifications about meeting the VIL Max of the
I2C Standard
Put the new part numbers in the Ordering Information Section
2.0
12/2003
Changed the maximum operating frequency to 133 MHz.
Put in the orderable part numbers that are orderable.
Put the timing in the 80 MHz column.
Rounded the timings to hundredths in the 80 MHz column.
Put the pin numbers in footnotes by the maximum currents in Table 6.
Changed 22 and 41 in the Timing.
Put in the Thermal numbers.
1.0
9/2003
Added the DSP information in the Features list
Fixed table formatting.
Nontechnical edits.
Released to the external web.
0.9
8/2003
Changed the USB description to full-/low-speed compatible.
0.8
8/2003
Added the Reference to USB 2.0 to the Features list and removed 1.1 from USB on the block
diagrams.
0.7
7/2003
Added the RxClav and TxClav signals to PC15.
0.6
6/2003
Changed the pin descriptions per the June 22 spec.
0.5
5/2003
Changed some more typos, put in the phsel and phreq pins. Corrected the USB timing.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MPC8271VRPIEA | IC MPU POWERQUICC II 516-PBGA |
| IDT7024L45J8 | IC SRAM 64KBIT 45NS 84PLCC |
| MPC8313VRAGDB | MPU POWERQUICC II PRO 516-PBGA |
| AMM40DTMT | CONN EDGECARD 80POS R/A .156 SLD |
| MPC850DECZQ66BU | IC MPU PWRQUICC 66MHZ 256-PBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC885ZP66 | 功能描述:微處理器 - MPU PQ I HIP6W DUET RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC885ZP80 | 功能描述:微處理器 - MPU PQ I HIP6W DUET RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC-8890 | 制造商:AAEON 制造商全稱:AAEON 功能描述:Intel Pentium M or Celeron M Processors |
| MPC-8890-A10 | 制造商:AAEON 制造商全稱:AAEON 功能描述:Intel Pentium M or Celeron M Processors |
| MPC-8890-A10-01 | 制造商:AAEON 制造商全稱:AAEON 功能描述:Intel Pentium M or Celeron M Processors |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。