參數(shù)資料
型號(hào)： MPC8555VTAQDX
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 1000 MHz, RISC PROCESSOR, PBGA783
封裝： 29 X 29 MM, 3.75 MM HEIGHT, 1 MM PITCH, LEAD FREE, FLIP CHIP, PLASTIC, BGA-783
文件頁(yè)數(shù)： 21/88頁(yè)
文件大小： 1244K
代理商： MPC8555VTAQDX
MPC8555E PowerQUICC III Integrated Communications Processor Hardware Specifications, Rev. 4
28
Freescale Semiconductor
Ethernet: Three-Speed, MII Management
8.2.4
TBI AC Timing Specifications
This section describes the TBI transmit and receive AC timing specifications.
8.2.4.1
TBI Transmit AC Timing Specifications
Table 24 provides the MII transmit AC timing specifications.
Figure 11 shows the TBI transmit AC timing diagram.
Figure 11. TBI Transmit AC Timing Diagram
Table 24. TBI Transmit AC Timing Specifications
At recommended operating conditions with LVDD of 3.3 V ± 5%.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
GTX_CLK clock period
tTTX
—8.0
—
ns
GTX_CLK duty cycle
tTTXH/tTTX
40
—
60
%
GMII data TCG[9:0], TX_ER, TX_EN setup time
GTX_CLK going high
tTTKHDV
2.0
—
ns
GMII data TCG[9:0], TX_ER, TX_EN hold time from
GTX_CLK going high
tTTKHDX
1.0
—
ns
GTX_CLK clock rise and fall time
tTTXR, tTTXF
2,3
——
1.0
ns
Notes:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state
)(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tTTKHDV
symbolizes the TBI transmit timing (TT) with respect to the time from tTTX (K) going high (H) until the referenced data
signals (D) reach the valid state (V) or setup time. Also, tTTKHDX symbolizes the TBI transmit timing (TT) with respect to the
time from tTTX (K) going high (H) until the referenced data signals (D) reach the invalid state (X) or hold time. Note that, in
general, the clock reference symbol representation is based on three letters representing the clock of a particular
functional. For example, the subscript of tTTX represents the TBI (T) transmit (TX) clock. For rise and fall times, the latter
convention is used with the appropriate letter: R (rise) or F (fall).
2. Signal timings are measured at 0.7 V and 1.9 V voltage levels.
3. Guaranteed by design.
GTX_CLK
TCG[9:0]
tTTXR
tTTX
tTTXH
tTTXR
tTTXF
tTTKHDV
tTTKHDX
tTTXF
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