參數(shù)資料
型號(hào): MPC8548EVTAUH
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 1333 MHz, MICROPROCESSOR, PBGA783
封裝: 29 X 29 MM, 1 MM PITCH, FLIP CHIP, LEAD FREE, PLASTIC, BGA-783
文件頁數(shù): 123/142頁
文件大?。?/td> 1504K
代理商: MPC8548EVTAUH
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
81
Serial RapidIO
Figure 52. Transmitter Output Compliance Mask
17.7
Receiver Specifications
LP-serial receiver electrical and timing specifications are stated in the text and tables of this section.
Receiver input impedance shall result in a differential return loss better that 10 dB and a common mode
return loss better than 6 dB from 100 MHz to (0.8)
× (baud frequency). This includes contributions from
on-chip circuitry, the chip package, and any off-chip components related to the receiver. AC coupling
components are included in this requirement. The reference impedance for return loss measurements is
100-
Ω resistive for differential return loss and 25-Ω resistive for common mode.
Table 61. Transmitter Differential Output Eye Diagram Parameters
Transmitter Type
VDIFFmin (mV)
VDIFFmax (mV)
A (UI)
B (UI)
1.25 GBaud short range
250
500
0.175
0.39
1.25 GBaud long range
400
800
0.175
0.39
2.5 GBaud short range
250
500
0.175
0.39
2.5 GBaud long range
400
800
0.175
0.39
3.125 GBaud short range
250
500
0.175
0.39
3.125 GBaud long range
400
800
0.175
0.39
0
VDIFF min
VDIFF max
–VDIFF min
–VDIFF max
0B
1-B
1
Time in UI
T
ransm
it
ter
Di
ff
e
rent
ia
lO
u
tput
V
o
lt
age
A1-A
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