參數(shù)資料
型號(hào)： MPC8548EPXAVHB
廠商： Freescale Semiconductor
文件頁數(shù)： 122/151頁
文件大?。?/td> 0K
描述： MPU POWERQUICC III 783-PBGA
產(chǎn)品培訓(xùn)模塊： MPC8548 PowerQUICC III Processors
標(biāo)準(zhǔn)包裝： 1
系列： MPC85xx
處理器類型： 32-位 MPC85xx PowerQUICC III
速度： 1.5GHz
電壓： 1.1V
安裝類型： 表面貼裝
封裝/外殼： 783-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 783-FCPBGA（29x29）
包裝： 托盤
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
72
Freescale Semiconductor
High-Speed Serial Interfaces (HSSI)
16.2.4
AC Requirements for SerDes Reference Clocks
The clock driver selected must provide a high quality reference clock with low phase noise and
cycle-to-cycle jitter. Phase noise less than 100 kHz can be tracked by the PLL and data recovery loops and
is less of a problem. Phase noise above 15 MHz is filtered by the PLL. The most problematic phase noise
occurs in the 1–15 MHz range. The source impedance of the clock driver must be 50
to match the
transmission line and reduce reflections which are a source of noise to the system.
The detailed AC requirements of the SerDes reference clocks are defined by each interface protocol based
on application usage. See the following sections for detailed information:
16.2.4.1
Spread Spectrum Clock
SD_REF_CLK/SD_REF_CLK are designed to work with a spread spectrum clock (+0% to –0.5%
spreading at 30–33 kHz rate is allowed), assuming both ends have same reference clock. For better results,
a source without significant unintended modulation must be used.
16.3
SerDes Transmitter and Receiver Reference Circuits
Figure 47 shows the reference circuits for SerDes data lane’s transmitter and receiver.
Figure 47. SerDes Transmitter and Receiver Reference Circuits
The DC and AC specification of SerDes data lanes are defined in each interface protocol section below
(PCI Express, Serial Rapid IO, or SGMII) in this document based on the application usage:
Note that external an AC coupling capacitor is required for the above three serial transmission protocols
with the capacitor value defined in the specification of each protocol section.
SD_TXn
SD_RXn
50
Receiver
Transmitter
50
50
50
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8548EPXAVHD 功能描述:微處理器 - MPU PQ38 PB ST WE 1500 R3.0 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8548EVTAQGA 制造商:Freescale Semiconductor 功能描述:MPC85XX RISC 32-BIT CMOS 1GHZ 1.8V/2.5V/3.3V 783-PIN BGA TRA - Bulk
MPC8548EVTAQGB 功能描述:微處理器 - MPU FG PQ38 8548 PB Free RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8548EVTAQGD 功能描述:微處理器 - MPU PQ38 ST WE 1000 R3.0 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8548EVTATGB 功能描述:微處理器 - MPU FG PQ38 8548 PB Free RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
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