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參數(shù)資料
| 型號(hào)： | MPC8547CHXAQG |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 1000 MHz, MICROPROCESSOR, CBGA783 |
| 封裝： | 29 X 29 MM, 1 MM PITCH, FLIP CHIP, CERAMIC, BGA-783 |
| 文件頁(yè)數(shù)： | 48/142頁(yè) |
| 文件大?。?/td> | 1504K |
| 代理商： | MPC8547CHXAQG |
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
141
Document Revision History
1
10/2007
Adjusted maximum SYSCLK frequency down in Table 5, “SYSCLK AC Timing Specifications” per
device erratum GEN-13.
Clarified notes to Table 6, “EC_GTX_CLK125 AC Timing Specifications.”
Clarified descriptions and added PCI/PCI-X to Table 9, “PLL Lock Times.”
Removed support for 266 and 200 Mbps data rates per device erratum GEN-13 in Section 6, “DDR and
Clarified Note 4 of Table 19, “DDR SDRAM Output AC Timing Specifications.”
Clarified the reference clock used in Section 7.2, “DUART AC Electrical Specifications.”
Updated parameter descriptions for tLBIVKH1, tLBIVKH2, tLBIXKH1, and tLBIXKH2 in Table 40, “Local Bus
Timing Parameters (BVDD = 3.3 V)—PLL Enabled” and Table 40, “Local Bus Timing Parameters
(BVDD = 2.5 V)—PLL Enabled.”
Updated parameter descriptions for tLBIVKH1, tLBIVKL2, tLBIXKH1, and tLBIXKL2 in Table 42, “Local Bus
and tLBIXKH2.
Added LUPWAIT signal to Figure 23, “Local Bus Signals (PLL Enabled)” and Figure 24, “Local Bus
Clarified the PCI reference clock in Section 14.2, “PCI/PCI-X AC Electrical Specifications”
Added Section 17.1, “Package Parameters.”
Added PBGA thermal information in Section 20.2, “Thermal for Version 2.1.1 and 2.1.2 Silicon
Updated.”
0
07/2007
Initial Release
Table 84. Document Revision History (continued)
Revision
Date
Substantive Change(s)
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