
MPC8540 Integrated Processor Hardware Specifications, Rev. 3.1
84
Freescale Semiconductor
Thermal
Ultimately, the final selection of an appropriate heat sink depends on many factors, such as thermal performance at
a given air velocity, spatial volume, mass, attachment method, assembly, and cost. Several heat sinks offered by
Aavid Thermalloy, Alpha Novatech, IERC, Chip Coolers, Millennium Electronics, and Wakefield Engineering offer
different heat sink-to-ambient thermal resistances, that will allow the MPC8540 to function in various environments.
16.2.1 Recommended Thermal Model
For system thermal modeling, the MPC8540 thermal model is shown in
Figure 46. Five cuboids are used to
represent this device. To simplify the model, the solder balls and substrate are modeled as a single block 29x29x1.47
mm with the conductivity adjusted accordingly. For modeling, the planar dimensions of the die are rounded to the
nearest mm, so the die is modeled as 10x12 mm at a thickness of 0.76 mm. The bump/underfill layer is modeled as
a collapsed resistance between the die and substrate assuming a conductivity of 0.6 in-plane and 1.9 W/mK in the
thickness dimension of 0.76 mm. The lid attach adhesive is also modeled as a collapsed resistance with dimensions
of 10x12x0.050 mm and the conductivity of 1 W/mK. The nickel plated copper lid is modeled as 12x14x1 mm.
Note that the die and lid are not centered on the substrate; there is a 1.5 mm offset documented in the case outline
Figure 46. MPC8540 Thermal Model
Die
Lid
Substrate and solder balls
Heat Source
Substrate
Side View of Model (Not to Scale)
Top View of Model (Not to Scale)
x
y
z
Conductivity
Value
Unit
Lid
(12
× 14 × 1 mm)
kx
360
W/(m
× K)
ky
360
kz
360
Lid Adhesive—Collapsed resistance
(10
× 12 × 0.050 mm)
kx
1
ky
1
kz
1
Die
(10
× 12 × 0.76 mm)
Bump/Underfill—Collapsed resistance
(10
× 12 × 0.070 mm)
kx
0.6
ky
0.6
kz
1.9
Substrate and Solder Balls
(29
× 29 × 1.47 mm)
kx
10.2
ky
10.2
kz
1.6
Adhesive
Bump/underfill