參數(shù)資料
型號: MPC852TCVR66A
廠商: Freescale Semiconductor
文件頁數(shù): 29/80頁
文件大?。?/td> 0K
描述: IC MPU POWERQUICC 66MHZ 256PBGA
標(biāo)準(zhǔn)包裝: 60
系列: MPC8xx
處理器類型: 32-位 MPC8xx PowerQUICC
速度: 66MHz
電壓: 1.8V
安裝類型: 表面貼裝
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-PBGA(23x23)
包裝: 托盤
MPC852T PowerQUICC Hardware Specifications, Rev. 4
Freescale Semiconductor
35
Bus Signal Timing
Table 11 shows the PCMCIA timing for the MPC852T.
Table 11. PCMCIA Timing
Num
Characteristic
33 MHz
40 MHz
50 MHz
66 MHz
Unit
Min
Max
Min
Max
Min
Max
Min
Max
J82
A(0:31), REG valid to PCMCIA Strobe
asserted.1 (MIN = 0.75
× B1 – 2.00)
1 PSST = 1. Otherwise add PSST times cycle time.
PSHT = 0. Otherwise add PSHT times cycle time.
These synchronous timings define when the WAITA signals are detected in order to freeze (or relieve) the
PCMCIA current cycle. The WAITA assertion is effective only if it is detected 2 cycles before the PSL
timer expiration. See the PCMCIA Interface section in the MPC866 PowerQUICC Family Reference
Manual.
20.70
16.70
13.00
9.40
ns
J83
A(0:31), REG valid to ALE negation.1
(MIN = 1.00
× B1 – 2.00)
28.30
23.00
18.00
13.20
ns
J84
CLKOUT to REG valid
(MAX = 0.25
× B1 + 8.00)
7.60
15.60
6.30
14.30
5.00
13.00
3.80
11.80
ns
J85
CLKOUT to REG Invalid.
(MIN = 0.25
× B1 + 1.00)
8.60
7.30
6.00
4.80
ns
J86
CLKOUT to CE1, CE2 asserted.
(MAX = 0.25
× B1 + 8.00)
7.60
15.60
6.30
14.30
5.00
13.00
3.80
11.80
ns
J87
CLKOUT to CE1, CE2 negated.
(MAX = 0.25
× B1 + 8.00)
7.60
15.60
6.30
14.30
5.00
13.00
3.80
11.80
ns
J88
CLKOUT to PCOE, IORD, PCWE, IOWR
assert time. (MAX = 0.00
× B1 + 11.00)
11.00
11.00
11.00
11.00
ns
J89
CLKOUT to PCOE, IORD, PCWE, IOWR
negate time. (MAX = 0.00
× B1 + 11.00)
2.00
11.00
2.00
11.00
2.00
11.00
2.00
11.00
ns
J90
CLKOUT to ALE assert time
(MAX = 0.25
× B1 + 6.30)
7.60
13.80
6.30
12.50
5.00
11.30
3.80
10.00
ns
J91
CLKOUT to ALE negate time
(MAX = 0.25
× B1 + 8.00)
15.60
14.30
13.00
11.80
ns
J92
PCWE, IOWR negated to D(0:31) invalid.1
(MIN = 0.25
× B1 – 2.00)
5.60
4.30
3.00
1.80
ns
J93
WAITA and WAITB valid to CLKOUT rising
edge.1 (MIN = 0.00
× B1 + 8.00)
8.00
8.00
8.00
8.00
ns
J94
CLKOUT rising edge to WAITA and WAITB
invalid.1 (MIN = 0.00
× B1 + 2.00)
2.00
2.00
2.00
2.00
ns
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