MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
26
NOTE
The voltage levels of the transmitter and the receiver depend on the SerDes control registers
which should be programmed at the recommended values for SGMII protocol
(L1_nVDD =1.0 V).
Table 26. SGMII DC Transmitter Electrical Characteristics
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply voltage
(L1_SDAVDD_0, L1_XCOREVDD)
XVDD_SRDS
0.95
1.0
1.05
V
—
Output high voltage
VOH
——
XVDD_SRDS-Typ/2
+ |VOD|-max/2
mV
1
Output low voltage
VOL
XVDD_SRDS-Typ/2
– |VOD|-max/2
——
mV
1
Output ringing
VRING
——
10
%
—
Output differential voltage 2, 3, 7
|VOD|
323
500
725
mV
Equalization
setting: 1.0
296
459
665
Equalization
setting: 1.09
269
417
604
Equalization
setting: 1.2
243
376
545
Equalization
setting: 1.33
215
333
483
Equalization
setting: 1.5
189
292
424
Equalization
setting: 1.71
162
250
362
Equalization
setting: 2.0
Output offset voltage
VOS
425
500
575
mV
1, 6
Output impedance (single-ended)
RO
40
—
60
—
Mismatch in a pair
RO
——
10
%
—
Change in VOD between “0” and
“1”
|VOD|—
—
25
mV
—