參數(shù)資料
型號: MPC8378CVRANDA
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 266 MHz, MICROPROCESSOR, PBGA689
封裝: 31 X 31 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-689
文件頁數(shù): 104/125頁
文件大?。?/td> 894K
代理商: MPC8378CVRANDA
MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
8
This figure shows the undershoot and overshoot voltages at the interfaces of the device.
Figure 2. Overshoot/Undershoot Voltage for GVDD/LVDD/OVDD/LBVDD
2.1.3
Output Driver Characteristics
This table provides information on the characteristics of the output driver strengths. The values are preliminary estimates.
2.2
Power Sequencing
The device requires its power rails to be applied in a specific sequence in order to ensure proper device operation. During the
power ramp up, before the power supplies are stable and if the I/O voltages are supplied before the core voltage, there may be
Table 4. Output Drive Capability
Driver Type1
Output Impedance (
)
Supply Voltage
Local bus interface utilities signals
45
LBVDD = 2.5V, 3.3V
40
LBVDD = 1.8 V
PCI signals
25
OVDD = 3.3 V
DDR1 signal
18
GVDD = 2.5 V
DDR2 signal
18
GVDD = 1.8 V
eTSEC 10/100/1000 signals
45
LVDD = 2.5 V, 3.3 V
DUART, system control, I2C, JTAG, SPI, and USB
45
OVDD = 3.3 V
GPIO signals
45
OVDD = 3.3 V
Note:
1. Specialized SerDes output capabilities are described in the relevant sections of these specifications (such as SGMII and
PCI Express)
GND
GND – 0.3 V
GND – 0.7 V
Not to Exceed 10%
G/L/O/LBVDD + 20%
G/L/O/LBVDD
G/L/O/LBVDD + 5%
of tinterface1
1. Note that tinterface refers to the clock period associated with the bus clock interface.
VIH
VIL
Note:
2. Note that with the PCI overshoot allowed (as specified above), the device does
not fully comply with the maximum AC ratings and device protection guideline outlined in
the PCI Rev. 2.3 Specification (Section 4.2.2.3).
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