參數(shù)資料
型號: MPC8360EZUALFG
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 667 MHz, RISC PROCESSOR, PBGA740
封裝: 37.50 X 37.50 MM, 1.46 MM HEIGHT, 1 MM PITCH, TBGA-740
文件頁數(shù): 58/102頁
文件大?。?/td> 606K
代理商: MPC8360EZUALFG
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
Freescale Semiconductor
59
HDLC, BISYNC, Transparent, and Synchronous UART DC Electrical Characteristics
This figure shows the UTOPIA timing with internal clock.
Figure 48. UTOPIA AC Timing (Internal Clock) Diagram
18
HDLC, BISYNC, Transparent, and Synchronous
UART
This section describes the DC and AC electrical specifications for the high level data link control (HDLC), BISYNC,
transparent, and synchronous UART protocols of the MPC8360E/58E.
18.1
HDLC, BISYNC, Transparent, and Synchronous UART DC
Electrical Characteristics
This table provides the DC electrical characteristics for the device HDLC, BISYNC, transparent, and synchronous UART
protocols.
18.2
HDLC, BISYNC, Transparent, and Synchronous UART AC Timing
Specifications
These tables provide the input and output AC timing specifications for HDLC, BISYNC, transparent, and synchronous UART
protocols.
Table 61. HDLC, BISYNC, Transparent, and Synchronous UART DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Output high voltage
VOH
IOH = –2.0 mA
2.4
V
Output low voltage
VOL
IOL = 3.2 mA
0.5
V
Input high voltage
VIH
—2.0
OVDD + 0.3
V
Input low voltage
VIL
—–0.3
0.8
V
Input current
IIN
0 V
≤VIN ≤OVDD
—±10
μA
Table 62. HDLC, BISYNC, and Transparent AC Timing Specifications1
Characteristic
Symbol2
Min
Max
Unit
Outputs—Internal clock delay
tHIKHOV
011.2
ns
Outputs—External clock delay
tHEKHOV
110.8
ns
UtopiaCLK (Output)
tUIIXKH
tUIKHOV
Input Signals:
UTOPIA
Output Signals:
UTOPIA
tUIIVKH
tUIKHOX
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