參數(shù)資料
型號(hào): MPC8349EVVAJDB
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 49/87頁(yè)
文件大小: 0K
描述: IC MPU PWRQUICC II 672-TBGA
標(biāo)準(zhǔn)包裝: 24
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 533MHz
電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 672-LBGA
供應(yīng)商設(shè)備封裝: 672-TBGA(35x35)
包裝: 托盤
配用: MPC8349E-MITX-GP-ND - KIT REFERENCE PLATFORM MPC8349E
MPC8349E-MITXE-ND - BOARD REFERENCE FOR MPC8349
MPC8349EA-MDS-PB-ND - KIT MODULAR DEV SYSTEM MPC8349E
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
Freescale Semiconductor
53
Package and Pin Listings
Figure 37 provides the AC test load for the SPI.
Figure 37. SPI AC Test Load
Figure 38 and Figure 39 represent the AC timings from Table 54. Note that although the specifications
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 38 shows the SPI timings in slave mode (external clock).
Figure 38. SPI AC Timing in Slave Mode (External Clock) Diagram
Figure 39 shows the SPI timings in master mode (internal clock).
Figure 39. SPI AC Timing in Master Mode (Internal Clock) Diagram
18 Package and Pin Listings
This section details package parameters, pin assignments, and dimensions. The MPC8349EA is available
Output
Z0 = 50 Ω
OVDD/2
RL = 50 Ω
SPICLK (Input)
tNEIXKH
tNEIVKH
tNEKHOX
Input Signals:
SPIMOSI
(See Note)
Output Signals:
SPIMISO
(See Note)
Note: The clock edge is selectable on SPI.
SPICLK (Output)
tNIIXKH
tNIKHOX
Input Signals:
SPIMISO
(See Note)
Output Signals:
SPIMOSI
(See Note)
Note: The clock edge is selectable on SPI.
tNIIVKH
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