參數(shù)資料
型號(hào)： MPC8347EVRALD
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 667 MHz, RISC PROCESSOR, PBGA620
封裝： 29 X 29 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-620
文件頁數(shù)： 34/102頁
文件大?。?/td> 1094K
代理商： MPC8347EVRALD
MPC8347E PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
Freescale Semiconductor
37
Local Bus
Figure 19 provides the AC test load for the local bus.
Figure 19. Local Bus C Test Load
Local bus clock to output valid
tLBKLOV
—3
ns
3
Local bus clock to output high impedance for LAD/LDP
tLBKHOZ
—4
ns
8
Notes:
1. The symbols for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for inputs
and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tLBIXKH1 symbolizes local bus timing (LB)
for the input (I) to go invalid (X) with respect to the time the tLBK clock reference (K) goes high (H), in this case for clock one
(1). Also, tLBKHOX symbolizes local bus timing (LB) for the tLBK clock reference (K) to go high (H), with respect to the output
(O) going invalid (X) or output hold time.
2. All timings are in reference to the falling edge of LCLK0 (for all outputs and for LGTA and LUPWAIT inputs) or the rising edge
of LCLK0 (for all other inputs).
3. All signals are measured from OVDD/2 of the rising/falling edge of LCLK0 to 0.4 × OVDD of the signal in question for 3.3 V
signaling levels.
4. Input timings are measured at the pin.
5. tLBOTOT1 should be used when RCWH[LALE] is not set and when the load on the LALE output pin is at least 10 pF less than
the load on the LAD output pins.
6. tLBOTOT2 should be used when RCWH[LALE] is set and when the load on the LALE output pin is at least 10 pF less than the
load on the LAD output pins.the
7. tLBOTOT3 should be used when RCWH[LALE] is set and when the load on the LALE output pin equals to the load on the LAD
output pins.
8. For purposes of active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
9. DLL bypass mode is not recommended for use at frequencies above 66 MHz.
Table 35. Local Bus General Timing Parameters—DLL Bypass9 (continued)
Parameter
Symbol1
Min
Max
Unit
Notes
Output
Z0 = 50 Ω
OVDD/2
RL = 50 Ω
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