參數(shù)資料
型號(hào): MPC8347ECZUADF
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 266 MHz, RISC PROCESSOR, PBGA672
封裝: 35 X 35 MM, 1.46 MM HEIGHT, 1 MM PITCH, TBGA-672
文件頁(yè)數(shù): 40/102頁(yè)
文件大?。?/td> 1094K
代理商: MPC8347ECZUADF
MPC8347E PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
42
Freescale Semiconductor
JTAG
11 JTAG
This section describes the DC and AC electrical specifications for the IEEE Std. 1149.1 (JTAG) interface
of the MPC8347E
11.1
JTAG DC Electrical Characteristics
Table 36 provides the DC electrical characteristics for the IEEE Std. 1149.1 (JTAG) interface of the
MPC8347E.
11.2
JTAG AC Timing Specifications
This section describes the AC electrical specifications for the IEEE Std. 1149.1 (JTAG) interface of the
MPC8347E. Table 37 provides the JTAG AC timing specifications as defined in Figure 27 through
Table 36. JTAG interface DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Input high voltage
VIH
OVDD –0.3
OVDD +0.3
V
Input low voltage
VIL
–0.3
0.8
V
Input current
IIN
±5
μA
Output high voltage
VOH
IOH = –8.0 mA
2.4
V
Output low voltage
VOL
IOL = 8.0 mA
0.5
V
Output low voltage
VOL
IOL = 3.2 mA
0.4
V
Table 37. JTAG AC Timing Specifications (Independent of CLKIN)1
At recommended operating conditions (see Table 2).
Parameter
Symbol2
Min
Max
Unit
Notes
JTAG external clock frequency of operation
fJTG
033.3
MHz
JTAG external clock cycle time
t JTG
30
ns
JTAG external clock pulse width measured at 1.4 V
tJTKHKL
15
ns
JTAG external clock rise and fall times
tJTGR, tJTGF
02
ns
TRST assert time
tTRST
25
ns
3
Input setup times:
Boundary-scan data
TMS, TDI
tJTDVKH
tJTIVKH
4
ns
4
Input hold times:
Boundary-scan data
TMS, TDI
tJTDXKH
tJTIXKH
10
ns
4
Valid times:
Boundary-scan data
TDO
tJTKLDV
tJTKLOV
2
11
ns
5
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