參數(shù)資料
型號: MPC8343ZQAGDB
廠商: Freescale Semiconductor
文件頁數(shù): 21/80頁
文件大小: 0K
描述: IC MPU PWRQUICC II 620-PBGA
標準包裝: 36
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 620-BBGA 裸露焊盤
供應商設備封裝: 620-PBGA(29x29)
包裝: 托盤
MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
28
Freescale Semiconductor
Ethernet: Three-Speed Ethernet, MII Management
8.3.2
MII Management AC Electrical Specifications
Table 30 provides the MII management AC timing specifications.
Input high current
IIH
VIN
1 = LV
DD
—10
μA
Input low current
IIL
VIN = LVDD
–15
μA
Note:
1. The symbol VIN, in this case, represents the LVIN symbol referenced in Table 1 and Table 2.
Table 29. MII Management DC Electrical Characteristics Powered at 3.3 V
Parameter
Symbol
Conditions
Min
Max
Unit
Supply voltage (3.3 V)
LVDD
2.97
3.63
V
Output high voltage
VOH
IOH = –1.0 mA
LVDD = Min
2.10
LVDD +0.3
V
Output low voltage
VOL
IOL = 1.0 mA
LVDD = Min
GND
0.50
V
Input high voltage
VIH
—2.00
V
Input low voltage
VIL
0.80
V
Input high current
IIH
LVDD = Max
VIN
1 = 2.1 V
40
μA
Input low current
IIL
LVDD = Max
VIN = 0.5 V
–600
μA
Note:
1. The symbol VIN, in this case, represents the LVIN symbol referenced in Table 1 and Table 2.
Table 30. MII Management AC Timing Specifications
At recommended operating conditions with LVDD is 3.3 V ± 10% or 2.5 V ± 5%.
Parameter/Condition
Symbol1
Min
Typ
Max
Unit
Notes
MDC frequency
fMDC
—2.5
MHz
2
MDC period
tMDC
—400
ns
MDC clock pulse width high
tMDCH
32
ns
MDC to MDIO delay
tMDKHDX
10
70
ns
3
MDIO to MDC setup time
tMDDVKH
5—
ns
MDIO to MDC hold time
tMDDXKH
0—
ns
MDC rise time
tMDCR
10
ns
Table 28. MII Management DC Electrical Characteristics Powered at 2.5 V (continued)
Parameter
Symbol
Conditions
Min
Max
Unit
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