
MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 2
12
Freescale Semiconductor
Power Characteristics
3
Power Characteristics
The estimated typical power dissipation for the MPC8343EA device is shown in
Table 4.l
Table 5 shows the estimated typical I/O power dissipation for MPC8343EA.
Table 4. MPC8343EA Power Dissipation 1
1
The values do not include I/O supply power (OVDD, LVDD, GVDD) or AVDD. For I/O power values, see
Table 5.
Core
Frequency
(MHz)
CSB Frequency
(MHz)
Typical at TJ = 65
Typical 2
, 3
2
Typical power is based on a voltage of Vdd = 1.2 V, a junction temperature of TJ = 105°C, and a Dhrystone benchmark
application.
3
Thermal solutions may need to design to a value higher than typical power based on the end application, TA target, and I/O
power.
Maximum 4
4
Maximum Power is based on a voltage of Vdd = 1.2 V, worst case process, a junction temperature of TJ = 105°C, and an
artificial smoke test.
Unit
PBGA
266
1.3
1.6
1.8
W
133
1.1
1.4
1.6
W
400
266
1.5
1.9
2.1
W
133
1.4
1.7
1.9
W
400
200
1.5
1.8
2.0
W
100
1.3
1.7
1.9
W
Table 5. MPC8343EA Typical I/O Power Dissipation
Interface
Parameter
GVDD
(1.8 V)
GVDD
(2.5 V)
OVDD
(3.3 V)
LVDD
(3.3 V)
LVDD
(2.5 V)
Unit
Comments
DDR I/O
65% utilization
2.5 V
Rs = 20
Ω
Rt = 50
Ω
2 pair of clocks
200 MHz, 32 bits
0.31
0.42
W
266 MHz, 32 bits
0.35
0.5
W
PCI I/O load = 30 pf
33 MHz, 32 bits
0.04
W
66 MHz, 32 bits
0.07
W
Local Bus I/O
Load = 25 pf
167 MHz, 32 bits
0.34
W
133 MHz, 32 bits
0.27
W
83 MHz, 32 bits
0.17
W
66 MHz, 32 bits
0.14
W
50 MHz, 32 bits
0.11
W