參數(shù)資料
型號(hào)： MPC8343CZQAGDX
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 400 MHz, MICROPROCESSOR, PBGA620
封裝： 29 X 29 MM, 2.46 MM HEIGHT, 1 MM PITCH, PLASTIC, BGA-620
文件頁(yè)數(shù)： 28/92頁(yè)
文件大?。?/td> 987K
代理商： MPC8343CZQAGDX
MPC8343E PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 6
34
Freescale Semiconductor
Local Bus
Figure 12 provides the AC test load for the local bus.
Figure 12. Local Bus C Test Load
LALE output fall to LAD output
transition (LATCH hold time)
tLBOTOT2
3—
ns
6
LALE output fall to LAD output
transition (LATCH hold time)
tLBOTOT3
2.5
—
ns
7
Local bus clock to output valid
tLBKHOV
—3
ns
3
Local bus clock to output high
impedance for LAD/LDP
tLBKHOZ
—4
ns
Notes:
1. The symbols used for timing specifications herein follow the pattern of t(First two letters of
functional block)(signal)(state) (reference)(state) for inputs and t(First two letters of functional
block)(reference)(state)(signal)(state) for outputs. For example, tLBIXKH1 symbolizes local bus
timing (LB) for the input (I) to go invalid (X) with respect to the time the tLBK clock reference
(K) goes high (H), in this case for clock one(1). Also, tLBKHOX symbolizes local bus timing
(LB) for the tLBK clock reference (K) to go high (H), with respect to the output (O) going
invalid (X) or output hold time.
2. All timings are in reference to falling edge of LCLK0 (for all outputs and for LGTA and
LUPWAIT inputs) or rising edge of LCLK0 (for all other inputs).
3. All signals are measured from OVDD/2 of the rising/falling edge of LCLK0 to 0.4 × OVDD
of the signal in question for 3.3-V signaling levels.
4. Input timings are measured at the pin.
5.tLBOTOT1 should be used when RCWH[LALE] is not set and when the load on LALE output
pin is at least 10pF less than the load on LAD output pins.
6.tLBOTOT2 should be used when RCWH[LALE] is set and when the load on LALE output pin
is at least 10pF less than the load on LAD output pins.
7.tLBOTOT3 should be used when RCWH[LALE] is set and when the load on LALE output pin
equals to the load on LAD output pins.
8. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be
when the total current delivered through the component pin is less than or equal to the
leakage current specification.
9. DLL bypass mode is not recommended for use at frequencies above 66MHz.
Table 28. Local Bus General Timing Parameters—DLL bypass (continued)
Parameter
Symbol 1
Min
Max
Unit
Notes
Output
Z0 = 50
OVDD/2
RL = 50
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8343EA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications
MPC8343ECVRADDB 功能描述:微處理器 - MPU 8347 PBGA NO-PB W/ ENC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8343ECVRAGD 功能描述:IC MPU PWRQUICC II PRO 620-PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:MPC83xx 標(biāo)準(zhǔn)包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點(diǎn):- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:783-FCPBGA（29x29） 包裝:托盤
MPC8343ECVRAGDB 功能描述:微處理器 - MPU 8347 PBGA NO-PB W/ ENC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8343ECZQADDB 功能描述:微處理器 - MPU 8347 PBGA ENCRYP W/ PB RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
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